We present a novel transmon qubit fabrication technique that yields systematic improvements in T1 coherence times. We fabricate devices using an encapsulation strategy that involvespassivating the surface of niobium and thereby preventing the formation of its lossy surface oxide. By maintaining the same superconducting metal and only varying the surface structure, this comparative investigation examining different capping materials and film substrates across different qubit foundries definitively demonstrates the detrimental impact that niobium oxides have on the coherence times of superconducting qubits, compared to native oxides of tantalum, aluminum or titanium nitride. Our surface-encapsulated niobium qubit devices exhibit T1 coherence times 2 to 5 times longer than baseline niobium qubit devices with native niobium oxides. When capping niobium with tantalum, we obtain median qubit lifetimes above 200 microseconds. Our comparative structural and chemical analysis suggests that amorphous niobium suboxides may induce higher losses. These results are in line with high-accuracy measurements of the niobium oxide loss tangent obtained with ultra-high Q superconducting radiofrequency (SRF) cavities. This new surface encapsulation strategy enables further reduction of dielectric losses via passivation with ambient-stable materials, while preserving fabrication and scalable manufacturability thanks to the compatibility with silicon processes.
Advanced simulations and calculations on quantum computers require high fidelity implementations of quantum circuits. The universal gateset approach builds complex unitaries from manygates drawn from a small set of calibrated high-fidelity primitive gates, which results in a lower combined fidelity. Compiling a complex unitary for processors with higher-dimensional logical elements, such as qutrits, exacerbates the accumulated error per unitary because a longer gate sequence is needed. Optimal control methods promise time and resource efficient compact gate sequences and, therefore, higher fidelity. These methods generate pulses that can, in principle, directly implement any complex unitary on a quantum device. In this work, we demonstrate that any arbitrary qutrit gate can be realized with high fidelity. We generated and tested pulses for a large set of randomly selected arbitrary unitaries on two separate qutrit compatible processors, LLNL Quantum Device and Integration Testbed (QuDIT) standard QPU and Rigetti Aspen-11, achieving an average fidelity around 99 %. We show that the optimal control gates do not require recalibration for at least three days and the same calibration parameters can be used for all implemented gates. Our work shows that the calibration overheads for optimal control gates can be made small enough to enable efficient quantum circuits based on this technique.
Error correcting codes use multi-qubit measurements to realize fault-tolerant quantum logic steps. In fact, the resources needed to scale-up fault-tolerant quantum computing hardwareare largely set by this task. Tailoring next-generation processors for joint measurements, therefore, could result in improvements to speed, accuracy, or cost — accelerating the development large-scale quantum computers. Here, we motivate such explorations by analyzing an unconventional surface code based on multi-body interactions between superconducting transmon qubits. Our central consideration, Hardware Optimized Parity (HOP) gates, achieves stabilizer-type measurements through simultaneous multi-qubit conditional phase accumulation. Despite the multi-body effects that underpin this approach, our estimates of logical faults suggest that this design can be at least as robust to realistic noise as conventional designs. We show a higher threshold of 1.25×10−3 compared to the standard code’s 0.79×10−3. However, in the HOP code the logical error rate decreases more slowly with decreasing physical error rate. Our results point to a fruitful path forward towards extending gate-model platforms for error correction at the dawn of its empirical development.
Continued advances in superconducting qubit performance require more detailed understandings of the many sources of decoherence. Within these devices, two-level systems arise due todefects, interfaces, and grain boundaries, and are thought to be a major source of qubit decoherence at millikelvin temperatures. In addition to Al, Nb is a commonly used metalization layer for superconducting qubits. Consequently, a significant effort is required to develop and qualify processes that mitigate defects in Nb films. As the fabrication of complete superconducting qubits and their characterization at millikelvin temperatures is a time and resource intensive process, it is desirable to have measurement tools that can rapidly characterize the properties of films and evaluate different treatments. Here we show that measurements of the variation of the superconducting critical temperature Tc with an applied external magnetic field H (of the phase boundary Tc−H) performed with very high resolution show features that are directly correlated with the structure of the Nb films. In combination with x-ray diffraction measurements, we show that one can even distinguish variations quality and crystal orientation of the grains in a Nb film by small but reproducible changes in the measured superconducting phase boundary.
Superconducting thin films of niobium have been extensively employed in transmon qubit architectures. Although these architectures have demonstrated remarkable improvements in recentyears, further improvements in performance through materials engineering will aid in large-scale deployment. Here, we use information retrieved from electron microscopy and analysis to conduct a detailed assessment of potential decoherence sources in transmon qubit test devices. In the niobium thin film, we observe the presence of localized strain at interfaces, which may amplify interactions between two-level systems and impose limits on T1 and T2 relaxation times. Additionally, we observe the presence of a surface oxide with varying stoichiometry and bond distances, which can generate a broad two-level system noise spectrum. Finally, a similarly disordered and rough interface is observed between Nb and the Si substrate. We propose that this interface can also degrade the overall superconducting properties.
Superconducting qubits have emerged as a potentially foundational platform technology for addressing complex computational problems deemed intractable with classical computing. Despiterecent advances enabling multiqubit designs that exhibit coherence lifetimes on the order of hundreds of μs, material quality and interfacial structures continue to curb device performance. When niobium is deployed as the superconducting material, two-level system defects in the thin film and adjacent dielectric regions introduce stochastic noise and dissipate electromagnetic energy at the cryogenic operating temperatures. In this study, we utilize time-of-flight secondary ion mass spectrometry (TOF-SIMS) to understand the role specific fabrication procedures play in introducing such dissipation mechanisms in these complex systems. We interrogated Nb thin films and transmon qubit structures fabricated by Rigetti Computing and at the National Institute of Standards and Technology through slight variations in the processing and vacuum conditions. We find that when Nb film is sputtered onto the Si substrate, oxide and silicide regions are generated at various interfaces. We also observe that impurity species such as niobium hydrides and carbides are incorporated within the niobium layer during the subsequent lithographic patterning steps. The formation of these resistive compounds likely impact the superconducting properties of the Nb thin film. Additionally, we observe the presence of halogen species distributed throughout the patterned thin films. We conclude by hypothesizing the source of such impurities in these structures in an effort to intelligently fabricate superconducting qubits and extend coherence times moving forward.
Assembling future large-scale quantum computers out of smaller, specialized modules promises to simplify a number of formidable science and engineering challenges. One of the primarychallenges in developing a modular architecture is in engineering high fidelity, low-latency quantum interconnects between modules. Here we demonstrate a modular solid state architecture with deterministic inter-module coupling between four physically separate, interchangeable superconducting qubit integrated circuits, achieving two-qubit gate fidelities as high as 99.1±0.5\% and 98.3±0.3\% for iSWAP and CZ entangling gates, respectively. The quality of the inter-module entanglement is further confirmed by a demonstration of Bell-inequality violation for disjoint pairs of entangled qubits across the four separate silicon dies. Having proven out the fundamental building blocks, this work provides the technological foundations for a modular quantum processor: technology which will accelerate near-term experimental efforts and open up new paths to the fault-tolerant era for solid state qubit architectures.