Accurate knowledge of the on-chip temperature is essential for understanding and optimizing the performance of superconducting qubits, yet direct thermometry at millikelvin temperaturesremains challenging. While qubits themselves are sensitive to the temperature of their environment, other factors may affect the qubits` effective temperature, and using them as thermometers with any accuracy requires specialized measurement protocols and qubit designs, limiting their practicality for routine diagnostics and adding complex infrastructure to any hardware testing apparatus. Here we demonstrate a complementary on-chip thermometry method based on superconducting Dayem bridges that are integrated on the same chip as transmon qubits. By extracting the critical current of the Dayem bridge from I-V measurements, we obtain a local, quantitative measure of the chip temperature without the need for microwave calibration or qubit-specific control sequences. To demonstrate the utility of the Dayem bridges as thermometers, we fabricate them in-situ with qubits on the same chip, calibrate the Dayem bridge critical current as a function of temperature, and characterize its resolution and stability at cryogenic temperatures. We additionally perform simultaneous measurements of the Dayem bridge thermometer and qubit excited-state population, and show agreement over the relevant temperature range, validating the method against established qubit thermometry. Furthermore, we correlate the independently measured chip temperature with qubit energy relaxation and dephasing times, demonstrating the utility of this approach for diagnosing temperature-dependent decoherence mechanisms. These results establish integrated Dayem bridges as a simple, non-invasive, and scalable tool for cryogenic hardware development, and on chip thermometry in superconducting quantum circuits.
The Superconducting Materials and Systems (SQMS) Center, a DOE National Quantum Information Science Research Center, has conducted a comprehensive and coordinated study using superconductingtransmon qubit chips with known performance metrics to identify the underlying materials-level sources of device-to-device performance variation. Following qubit coherence measurements, these qubits of varying base superconducting metals and substrates have been examined with various nondestructive and invasive material characterization techniques at Northwestern University, Ames National Laboratory, and Fermilab as part of a blind study. We find trends in variations of the depth of the etched substrate trench, the thickness of the surface oxide, and the geometry of the sidewall, which when combined, lead to correlations with the T1 lifetime across different devices. In addition, we provide a list of features that varied from device to device, for which the impact on performance requires further studies. Finally, we identify two low-temperature characterization techniques that may potentially serve as proxy tools for qubit measurements. These insights provide materials-oriented solutions to not only reduce performance variations across neighboring devices, but also to engineer and fabricate devices with optimal geometries to achieve performance metrics beyond the state-of-the-art values.
We present a novel transmon qubit fabrication technique that yields systematic improvements in T1 coherence times. We fabricate devices using an encapsulation strategy that involvespassivating the surface of niobium and thereby preventing the formation of its lossy surface oxide. By maintaining the same superconducting metal and only varying the surface structure, this comparative investigation examining different capping materials and film substrates across different qubit foundries definitively demonstrates the detrimental impact that niobium oxides have on the coherence times of superconducting qubits, compared to native oxides of tantalum, aluminum or titanium nitride. Our surface-encapsulated niobium qubit devices exhibit T1 coherence times 2 to 5 times longer than baseline niobium qubit devices with native niobium oxides. When capping niobium with tantalum, we obtain median qubit lifetimes above 200 microseconds. Our comparative structural and chemical analysis suggests that amorphous niobium suboxides may induce higher losses. These results are in line with high-accuracy measurements of the niobium oxide loss tangent obtained with ultra-high Q superconducting radiofrequency (SRF) cavities. This new surface encapsulation strategy enables further reduction of dielectric losses via passivation with ambient-stable materials, while preserving fabrication and scalable manufacturability thanks to the compatibility with silicon processes.