Extensive characterization of a family of efficient three-qubit gates at the coherence limit

  1. Christopher W. Warren,
  2. Jorge Fernández-Pendás,
  3. Shahnawaz Ahmed,
  4. Tahereh Abad,
  5. Andreas Bengtsson,
  6. Janka Biznárová,
  7. Kamanasish Debnath,
  8. Xiu Gu,
  9. Christian Križan,
  10. Amr Osman,
  11. Anita Fadavi Roudsari,
  12. Per Delsing,
  13. Göran Johansson,
  14. Anton Frisk Kockum,
  15. Giovanna Tancredi,
  16. and Jonas Bylander
While all quantum algorithms can be expressed in terms of single-qubit and two-qubit gates, more expressive gate sets can help reduce the algorithmic depth. This is important in the
presence of gate errors, especially those due to decoherence. Using superconducting qubits, we have implemented a three-qubit gate by simultaneously applying two-qubit operations, thereby realizing a three-body interaction. This method straightforwardly extends to other quantum hardware architectures, requires only a „firmware“ upgrade to implement, and is faster than its constituent two-qubit gates. The three-qubit gate represents an entire family of operations, creating flexibility in quantum-circuit compilation. We demonstrate a gate fidelity of 97.90%, which is near the coherence limit of our device. We then generate two classes of entangled states, the GHZ and W states, by applying the new gate only once; in comparison, decompositions into the standard gate set would have a two-qubit gate depth of two and three, respectively. Finally, we combine characterization methods and analyze the experimental and statistical errors on the fidelity of the gates and of the target states.

Measurement and control of a superconducting quantum processor with a fully-integrated radio-frequency system on a chip

  1. Mats O. Tholén,
  2. Riccardo Borgani,
  3. Giuseppe Ruggero Di Carlo,
  4. Andreas Bengtsson,
  5. Christian Križan,
  6. Marina Kudra,
  7. Giovanna Tancredi,
  8. Jonas Bylander,
  9. Per Delsing,
  10. Simone Gasparinetti,
  11. and David B. Haviland
We describe a digital microwave platform called Presto, designed for measurement and control of multiple quantum bits (qubits) and based on the third-generation radio-frequency system
on a chip. Presto uses direct digital synthesis to create signals up to 9 GHz on 16 synchronous output ports, while synchronously analyzing response on 16 input ports. Presto has 16 DC-bias outputs, 4 inputs and 4 outputs for digital triggers or markers, and two continuous-wave outputs for synthesizing frequencies up to 15 GHz. Scaling to a large number of qubits is enabled through deterministic synchronization of multiple Presto units. A Python application programming interface configures a firmware for synthesis and analysis of pulses, coordinated by an event sequencer. The analysis integrates template matching (matched filtering) and low-latency (184 – 254 ns) feedback to enable a wide range of multi-qubit experiments. We demonstrate Presto’s capabilities with experiments on a sample consisting of two superconducting qubits connected via a flux-tunable coupler. We show single-shot readout and active reset of a single qubit; randomized benchmarking of single-qubit gates showing 99.972% fidelity, limited by the coherence time of the qubit; and calibration of a two-qubit iSWAP gate.

Building Blocks of a Flip-Chip Integrated Superconducting Quantum Processor

  1. Sandoko Kosen,
  2. Hang-Xi Li,
  3. Marcus Rommel,
  4. Daryoush Shiri,
  5. Christopher Warren,
  6. Leif Grönberg,
  7. Jaakko Salonen,
  8. Tahereh Abad,
  9. Janka Biznárová,
  10. Marco Caputo,
  11. Liangyu Chen,
  12. Kestutis Grigoras,
  13. Göran Johansson,
  14. Anton Frisk Kockum,
  15. Christian Križan,
  16. Daniel Pérez Lozano,
  17. Graham Norris,
  18. Amr Osman,
  19. Jorge Fernández-Pendás,
  20. Anita Fadavi Roudsari,
  21. Giovanna Tancredi,
  22. Andreas Wallraff,
  23. Christopher Eichler,
  24. Joonas Govenius,
  25. and Jonas Bylander
We have integrated single and coupled superconducting transmon qubits into flip-chip modules. Each module consists of two chips – one quantum chip and one control chip –
that are bump-bonded together. We demonstrate time-averaged coherence times exceeding 90μs, single-qubit gate fidelities exceeding 99.9%, and two-qubit gate fidelities above 98.6%. We also present device design methods and discuss the sensitivity of device parameters to variation in interchip spacing. Notably, the additional flip-chip fabrication steps do not degrade the qubit performance compared to our baseline state-of-the-art in single-chip, planar circuits. This integration technique can be extended to the realisation of quantum processors accommodating hundreds of qubits in one module as it offers adequate input/output wiring access to all qubits and couplers.

Quantum approximate optimization of the exact-cover problem on a superconducting quantum processor

  1. Andreas Bengtsson,
  2. Pontus Vikstål,
  3. Christopher Warren,
  4. Marika Svensson,
  5. Xiu Gu,
  6. Anton Frisk Kockum,
  7. Philip Krantz,
  8. Christian Križan,
  9. Daryoush Shiri,
  10. Ida-Maria Svensson,
  11. Giovanna Tancredi,
  12. Göran Johansson,
  13. Per Delsing,
  14. Giulia Ferrini,
  15. and Jonas Bylander
Present-day, noisy, small or intermediate-scale quantum processors—although far from fault-tolerant—support the execution of heuristic quantum algorithms, which might enable
a quantum advantage, for example, when applied to combinatorial optimization problems. On small-scale quantum processors, validations of such algorithms serve as important technology demonstrators. We implement the quantum approximate optimization algorithm (QAOA) on our hardware platform, consisting of two transmon qubits and one parametrically modulated coupler. We solve small instances of the NP-complete exact-cover problem, with 96.6\% success probability, by iterating the algorithm up to level two.