Enhanced Superconducting Qubit Performance Through Ammonium Fluoride Etch

  1. Cameron J. Kopas,
  2. Dominic P. Goronzy,
  3. Thang Pham,
  4. Carlos G. Torres-Castanedo,
  5. Matthew Cheng,
  6. Rory Cochrane,
  7. Patrick Nast,
  8. Ella Lachman,
  9. Nikolay Z. Zhelev,
  10. Andre Vallieres,
  11. Akshay A. Murthy,
  12. Jin-su Oh,
  13. Lin Zhou,
  14. Matthew J. Kramer,
  15. Hilal Cansizoglu,
  16. Michael J. Bedzyk,
  17. Vinayak P. Dravid,
  18. Alexander Romanenko,
  19. Anna Grassellino,
  20. Josh Y. Mutus,
  21. Mark C. Hersam,
  22. and Kameshwar Yadavalli
The performance of superconducting qubits is often limited by dissipation and two-level systems (TLS) losses. The dominant sources of these losses are believed to originate from amorphous
materials and defects at interfaces and surfaces, likely as a result of fabrication processes or ambient exposure. Here, we explore a novel wet chemical surface treatment at the Josephson junction-substrate and the substrate-air interfaces by replacing a buffered oxide etch (BOE) cleaning process with one that uses hydrofluoric acid followed by aqueous ammonium fluoride. We show that the ammonium fluoride etch process results in a statistically significant improvement in median T1 by ∼22% (p=0.002), and a reduction in the number of strongly-coupled TLS in the tunable frequency range. Microwave resonator measurements on samples treated with the ammonium fluoride etch prior to niobium deposition also show ∼33% lower TLS-induced loss tangent compared to the BOE treated samples. As the chemical treatment primarily modifies the Josephson junction-substrate interface and substrate-air interface, we perform targeted chemical and structural characterizations to examine materials‘ differences at these interfaces and identify multiple microscopic changes that could contribute to decreased TLS.

Precision frequency tuning of tunable transmon qubits using alternating-bias assisted annealing

  1. Xiqiao Wang,
  2. Joel Howard,
  3. Eyob A. Sete,
  4. Greg Stiehl,
  5. Cameron Kopas,
  6. Stefano Poletto,
  7. Xian Wu,
  8. Mark Field,
  9. Nicholas Sharac,
  10. Christopher Eckberg,
  11. Hilal Cansizoglu,
  12. Raja Katta,
  13. Josh Mutus,
  14. Andrew Bestwick,
  15. Kameshwar Yadavalli,
  16. and David P. Pappas
Superconducting quantum processors are one of the leading platforms for realizing scalable fault-tolerant quantum computation (FTQC). The recent demonstration of post-fabrication tuning
of Josephson junctions using alternating-bias assisted annealing (ABAA) technique and a reduction in junction loss after ABAA illuminates a promising path towards precision tuning of qubit frequency while maintaining high coherence. Here, we demonstrate precision tuning of the maximum |0⟩→|1⟩ transition frequency (fmax01) of tunable transmon qubits by performing ABAA at room temperature using commercially available test equipment. We characterize the impact of junction relaxation and aging on resistance spread after tuning, and demonstrate a frequency equivalent tuning precision of 7.7 MHz (0.17%) based on targeted resistance tuning on hundreds of qubits, with a resistance tuning range up to 18.5%. Cryogenic measurements on tuned and untuned qubits show evidence of improved coherence after ABAA with no significant impact on tunability. Despite a small global offset, we show an empirical fmax01 tuning precision of 18.4 MHz by tuning a set of multi-qubit processors targeting their designed Hamiltonians. We experimentally characterize high-fidelity parametric resonance iSWAP gates on two ABAA-tuned 9-qubit processors with fidelity as high as 99.51±0.20%. On the best-performing device, we measured across the device a median fidelity of 99.22% and an average fidelity of 99.13±0.12%. Yield modeling analysis predicts high detuning-edge-yield using ABAA beyond the 1000-qubit scale. These results demonstrate the cutting-edge capability of frequency targeting using ABAA and open up a new avenue to systematically improving Hamiltonian targeting and optimization for scaling high-performance superconducting quantum processors.

Alternating Bias Assisted Annealing of Amorphous Oxide Tunnel Junctions

  1. David P. Pappas,
  2. Mark Field,
  3. Cameron Kopas,
  4. Joel A. Howard,
  5. Xiqiao Wang,
  6. Ella Lachman,
  7. Lin Zhou,
  8. Jinsu Oh,
  9. Kameshwar Yadavalli,
  10. Eyob A. Sete,
  11. Andrew Bestwick,
  12. Matthew J. Kramer,
  13. and Joshua Y. Mutus
We demonstrate a transformational technique for controllably tuning the electrical properties of fabricated thermally oxidized amorphous aluminum-oxide tunnel junctions. Using conventional
test equipment to apply an alternating bias to a heated tunnel barrier, giant increases in the room temperature resistance, greater than 70%, can be achieved. The rate of resistance change is shown to be strongly temperature-dependent, and is independent of junction size in the sub-micron regime. In order to measure their tunneling properties at mK temperatures, we characterized transmon qubit junctions treated with this alternating-bias assisted annealing (ABAA) technique. The measured frequencies follow the Ambegaokar-Baratoff relation between the shifted resistance and critical current. Further, these studies show a reduction of junction-contributed loss on the order of ≈2×10−6, along with a significant reduction in resonant- and off-resonant-two level system defects when compared to untreated samples. Imaging with high-resolution TEM shows that the barrier is still predominantly amorphous with a more uniform distribution of aluminum coordination across the barrier relative to untreated junctions. This new approach is expected to be widely applicable to a broad range of devices that rely on amorphous aluminum oxide, as well as the many other metal-insulator-metal structures used in modern electronics.

Systematic Improvements in Transmon Qubit Coherence Enabled by Niobium Surface Encapsulation

  1. Mustafa Bal,
  2. Akshay A. Murthy,
  3. Shaojiang Zhu,
  4. Francesco Crisa,
  5. Xinyuan You,
  6. Ziwen Huang,
  7. Tanay Roy,
  8. Jaeyel Lee,
  9. David van Zanten,
  10. Roman Pilipenko,
  11. Ivan Nekrashevich,
  12. Daniel Bafia,
  13. Yulia Krasnikova,
  14. Cameron J. Kopas,
  15. Ella O. Lachman,
  16. Duncan Miller,
  17. Josh Y. Mutus,
  18. Matthew J. Reagor,
  19. Hilal Cansizoglu,
  20. Jayss Marshall,
  21. David P. Pappas,
  22. Kim Vu,
  23. Kameshwar Yadavalli,
  24. Jin-Su Oh,
  25. Lin Zhou,
  26. Matthew J. Kramer,
  27. Dominic P. Goronzy,
  28. Carlos G. Torres-Castanedo,
  29. Graham Pritchard,
  30. Vinayak P. Dravid,
  31. James M. Rondinelli,
  32. Michael J. Bedzyk,
  33. Mark C. Hersam,
  34. John Zasadzinski,
  35. Jens Koch,
  36. James A. Sauls,
  37. Alexander Romanenko,
  38. and Anna Grassellino
We present a novel transmon qubit fabrication technique that yields systematic improvements in T1 coherence times. We fabricate devices using an encapsulation strategy that involves
passivating the surface of niobium and thereby preventing the formation of its lossy surface oxide. By maintaining the same superconducting metal and only varying the surface structure, this comparative investigation examining different capping materials and film substrates across different qubit foundries definitively demonstrates the detrimental impact that niobium oxides have on the coherence times of superconducting qubits, compared to native oxides of tantalum, aluminum or titanium nitride. Our surface-encapsulated niobium qubit devices exhibit T1 coherence times 2 to 5 times longer than baseline niobium qubit devices with native niobium oxides. When capping niobium with tantalum, we obtain median qubit lifetimes above 200 microseconds. Our comparative structural and chemical analysis suggests that amorphous niobium suboxides may induce higher losses. These results are in line with high-accuracy measurements of the niobium oxide loss tangent obtained with ultra-high Q superconducting radiofrequency (SRF) cavities. This new surface encapsulation strategy enables further reduction of dielectric losses via passivation with ambient-stable materials, while preserving fabrication and scalable manufacturability thanks to the compatibility with silicon processes.