Superconducting quantum processors are one of the leading platforms for realizing scalable fault-tolerant quantum computation (FTQC). The recent demonstration of post-fabrication tuningof Josephson junctions using alternating-bias assisted annealing (ABAA) technique and a reduction in junction loss after ABAA illuminates a promising path towards precision tuning of qubit frequency while maintaining high coherence. Here, we demonstrate precision tuning of the maximum |0⟩→|1⟩ transition frequency (fmax01) of tunable transmon qubits by performing ABAA at room temperature using commercially available test equipment. We characterize the impact of junction relaxation and aging on resistance spread after tuning, and demonstrate a frequency equivalent tuning precision of 7.7 MHz (0.17%) based on targeted resistance tuning on hundreds of qubits, with a resistance tuning range up to 18.5%. Cryogenic measurements on tuned and untuned qubits show evidence of improved coherence after ABAA with no significant impact on tunability. Despite a small global offset, we show an empirical fmax01 tuning precision of 18.4 MHz by tuning a set of multi-qubit processors targeting their designed Hamiltonians. We experimentally characterize high-fidelity parametric resonance iSWAP gates on two ABAA-tuned 9-qubit processors with fidelity as high as 99.51±0.20%. On the best-performing device, we measured across the device a median fidelity of 99.22% and an average fidelity of 99.13±0.12%. Yield modeling analysis predicts high detuning-edge-yield using ABAA beyond the 1000-qubit scale. These results demonstrate the cutting-edge capability of frequency targeting using ABAA and open up a new avenue to systematically improving Hamiltonian targeting and optimization for scaling high-performance superconducting quantum processors.
Simulating plasma physics on quantum computers is difficult, because most problems of interest are nonlinear, but quantum computers are not naturally suitable for nonlinear operations.In weakly nonlinear regimes, plasma problems can be modeled as wave-wave interactions. In this paper, we develop a quantization approach to convert nonlinear wave-wave interaction problems to Hamiltonian simulation problems. We demonstrate our approach using two qubits on a superconducting device. Unlike a photonic device, a superconducting device does not naturally have the desired interactions in its native Hamiltonian. Nevertheless, Hamiltonian simulations can still be performed by decomposing required unitary operations into native gates. To improve experimental results, we employ a range of error mitigation techniques. Apart from readout error mitigation, we use randomized compilation to transform undiagnosed coherent errors into well-behaved stochastic Pauli channels. Moreover, to compensate for stochastic noise, we rescale exponentially decaying probability amplitudes using rates measured from cycle benchmarking. We carefully consider how different choices of product-formula algorithms affect the overall error and show how a trade-off can be made to best utilize limited quantum resources. This study provides a point example of how plasma problems may be solved on near-term quantum computing platforms.
We analyze the experimental error budget of parametric resonance gates in a tunable coupler architecture. We identify and characterize various sources of errors, including incoherent,leakage, amplitude, and phase errors. By varying the two-qubit gate time, we explore the dynamics of these errors and their impact on the gate fidelity. To accurately capture the impact of incoherent errors on gate fidelity, we measure the coherence times of qubits under gate operating conditions. Our findings reveal that the incoherent errors, mainly arising from qubit relaxation and dephasing due to white noise, limit the fidelity of the two-qubit gates. Moreover, we demonstrate that leakage to noncomputational states is the second largest contributor to the two-qubit gates infidelity, as characterized using leakage-randomized benchmarking. The error budgeting methodology we developed here can be effectively applied to other types of gate implementations.
We demonstrate a transformational technique for controllably tuning the electrical properties of fabricated thermally oxidized amorphous aluminum-oxide tunnel junctions. Using conventionaltest equipment to apply an alternating bias to a heated tunnel barrier, giant increases in the room temperature resistance, greater than 70%, can be achieved. The rate of resistance change is shown to be strongly temperature-dependent, and is independent of junction size in the sub-micron regime. In order to measure their tunneling properties at mK temperatures, we characterized transmon qubit junctions treated with this alternating-bias assisted annealing (ABAA) technique. The measured frequencies follow the Ambegaokar-Baratoff relation between the shifted resistance and critical current. Further, these studies show a reduction of junction-contributed loss on the order of ≈2×10−6, along with a significant reduction in resonant- and off-resonant-two level system defects when compared to untreated samples. Imaging with high-resolution TEM shows that the barrier is still predominantly amorphous with a more uniform distribution of aluminum coordination across the barrier relative to untreated junctions. This new approach is expected to be widely applicable to a broad range of devices that rely on amorphous aluminum oxide, as well as the many other metal-insulator-metal structures used in modern electronics.
We use a floating tunable coupler to mediate interactions between qubits on separate chips to build a modular architecture. We demonstrate three different designs of multi-chip tunablecouplers using vacuum gap capacitors or superconducting indium bump bonds to connect the coupler to a microwave line on a common substrate and then connect to the qubit on the next chip. We show that the zero-coupling condition between qubits on separate chips can be achieved in each design and that the relaxation rates for the coupler and qubits are not noticeably affected by the extra circuit elements. Finally, we demonstrate two-qubit gate operations with fidelity at the same level as qubits with a tunable coupler on a single chip. Using one or more indium bonds does not degrade qubit coherence or impact the performance of two-qubit gates.
Error correcting codes use multi-qubit measurements to realize fault-tolerant quantum logic steps. In fact, the resources needed to scale-up fault-tolerant quantum computing hardwareare largely set by this task. Tailoring next-generation processors for joint measurements, therefore, could result in improvements to speed, accuracy, or cost — accelerating the development large-scale quantum computers. Here, we motivate such explorations by analyzing an unconventional surface code based on multi-body interactions between superconducting transmon qubits. Our central consideration, Hardware Optimized Parity (HOP) gates, achieves stabilizer-type measurements through simultaneous multi-qubit conditional phase accumulation. Despite the multi-body effects that underpin this approach, our estimates of logical faults suggest that this design can be at least as robust to realistic noise as conventional designs. We show a higher threshold of 1.25×10−3 compared to the standard code’s 0.79×10−3. However, in the HOP code the logical error rate decreases more slowly with decreasing physical error rate. Our results point to a fruitful path forward towards extending gate-model platforms for error correction at the dawn of its empirical development.
As the field of quantum computing progresses to larger-scale devices, multiplexing will be crucial to scale quantum processors. While multiplexed readout is common practice for superconductingdevices, relatively little work has been reported about the combination of flux and microwave control lines. Here, we present a method to integrate a microwave line and a flux line into a single „XYZ line“. This combined control line allows us to perform fast single-qubit gates as well as to deliver flux signals to the qubits. The measured relaxation times of the qubits are comparable to state-of-art devices employing separate control lines. We benchmark the fidelity of single-qubit gates with randomized benchmarking, achieving a fidelity above 99.5%, and we demonstrate that XYZ lines can in principle be used to run parametric entangling gates.
We propose a floating tunable coupler that does not rely on direct qubit-qubit coupling capacitances to achieve the zero-coupling condition. We show that the polarity of the qubit-couplercouplings can be engineered to offset the otherwise constant qubit-qubit coupling and attain the zero-coupling condition when the coupler frequency is above or below the qubit frequencies. We experimentally demonstrate these two operating regimes of the tunable coupler by implementing symmetric and asymmetric configurations of the coupler’s superconducting pads with respect to the qubits. Such a floating tunable coupler provides flexibility in designing large-scale quantum processors while reducing the always-on residual couplings.
Assembling future large-scale quantum computers out of smaller, specialized modules promises to simplify a number of formidable science and engineering challenges. One of the primarychallenges in developing a modular architecture is in engineering high fidelity, low-latency quantum interconnects between modules. Here we demonstrate a modular solid state architecture with deterministic inter-module coupling between four physically separate, interchangeable superconducting qubit integrated circuits, achieving two-qubit gate fidelities as high as 99.1±0.5\% and 98.3±0.3\% for iSWAP and CZ entangling gates, respectively. The quality of the inter-module entanglement is further confirmed by a demonstration of Bell-inequality violation for disjoint pairs of entangled qubits across the four separate silicon dies. Having proven out the fundamental building blocks, this work provides the technological foundations for a modular quantum processor: technology which will accelerate near-term experimental efforts and open up new paths to the fault-tolerant era for solid state qubit architectures.
With superconducting transmon qubits — a promising platform for quantum information processing — two-qubit gates can be performed using AC signals to modulate a tunabletransmon’s frequency via magnetic flux through its SQUID loop. However, frequency tunablity introduces an additional dephasing mechanism from magnetic fluctuations. In this work, we experimentally study the contribution of instrumentation noise to flux instability and the resulting error rate of parametrically activated two-qubit gates. Specifically, we measure the qubit coherence time under flux modulation while injecting broadband noise through the flux control channel. We model the noise’s effect using a dephasing rate model that matches well to the measured rates, and use it to prescribe a noise floor required to achieve a desired two-qubit gate infidelity. Finally, we demonstrate that low-pass filtering the AC signal used to drive two-qubit gates between the first and second harmonic frequencies can reduce qubit sensitivity to flux noise at the AC sweet spot (ACSS), confirming an earlier theoretical prediction. The framework we present to determine instrumentation noise floors required for high entangling two-qubit gate fidelity should be extensible to other quantum information processing systems.