Superconducting Flux Memory for Cryogenic Applications

  1. Tony X. Zhou,
  2. John McFarland,
  3. Aruna N. Ramanayaka,
  4. Brian Sears,
  5. Colin Stack,
  6. Aref Fouladi,
  7. Robert Smith,
  8. Sambarta Rakshit,
  9. Zachary A. Stegen,
  10. Keith D. Hillaire,
  11. Moe Khalil,
  12. Robert M. Young,
  13. David G. Ferguson,
  14. Anthony J. Przybysz,
  15. John X. Pryzbysz,
  16. Mark Covington,
  17. Gregory R Boyd,
  18. Jeremy Clark,
  19. and Aaron Pesetski
We report the development of flux memory for use with superconducting circuits. This technology stores persistent currents in superconducting loops on-chip to be used to provide flux
biasing for superconducting circuits, like qubits. We developed three types of flux memory and draw comparisons among them for circuit design. We demonstrate the utility of flux memory by using an in-situ flux detector and characterize each approach and further demonstrate that once flux is set in a memory cell, benchtop DC control sources can be powered off, leaving the on-chip flux bias in place. We propose that flux memory can be arranged in a two-dimensional configuration to multiplex control signals and reduce how line counts scale (N^2 devices -> 2N control lines), and our experimental results pave the path to the proposed scalability. We demonstrate the use of flux memory to flux bias a transmon qubit and show the tunability of the qubit state to a target frequency which remained stable on-chip for 20 hours.

Scaling Alternating-Bias-Assisted Annealing for Precision Transmon Frequency Targeting on Superconducting Quantum Processors

  1. Xiqiao Wang,
  2. Mark Field,
  3. Teng Zhang,
  4. Xian Wu,
  5. Ferhat Aydinoglu,
  6. Joel Howard,
  7. Angela Q. Chen,
  8. Sara Elzeiny,
  9. Robert Smith,
  10. Timothy McSorley,
  11. Nicholas Sharac,
  12. Eyob Sete,
  13. Alysson Gold,
  14. Hilal Cansizoglu,
  15. Greg Stiehl,
  16. Josh Mutus,
  17. Kameshwar Yadavalli,
  18. Andrew Bestwick,
  19. Stefano Poletto,
  20. Raja Katta,
  21. and David P. Pappas
Recent advances in the alternating-bias-assisted annealing (ABAA) technique have successfully mitigated intrinsic Josephson-junction (JJ) fabrication variations. This new technique
enables precision qubit frequency tuning alongside simplicity. However, it is critical to enhance tuning throughput and yield while investigating the factors that drive targeting performance as the technology scales. Here, we characterize ABAA tuning performance within a 150-mm wafer process flow and extend this technique to simultaneous, multi-channel tuning, demonstrating that a wafer-scale JJ resistance tuning precision of σ=0.50±0.05% alongside a component-level yield of ≥98.8% can be achieved. Furthermore, we demonstrate a strong correlation between yield, tuning speed, and junction breakdown voltage, establishing the latter as a vital process control parameter for meeting production goals. Finally, we demonstrate a successful implementation of ABAA tuning on a quad-module quantum processor (Rigetti Cepheus-1-36Q), where we achieve an empirical frequency targeting precision of σ∼30 MHz in both qubit and qubit-qubit detuning frequencies, contributing to high median two-qubit gate fidelities. These results confirm the efficacy and scalability of ABAA for high-precision Hamiltonian targeting, a critical enabler for modular superconducting quantum processor technology.