Solid-state qubits with transition frequencies in the microwave regime, such as superconducting qubits, are at the forefront of quantum information processing. However, high-fidelity,simultaneous control of superconducting qubits at even a moderate scale remains a challenge, partly due to the complexities of packaging these devices. Here, we present an approach to microwave package design focusing on material choices, signal line engineering, and spurious mode suppression. We describe design guidelines validated using simulations and measurements used to develop a 24-port microwave package. Analyzing the qubit environment reveals no spurious modes up to 11GHz. The material and geometric design choices enable the package to support qubits with lifetimes exceeding 350 {\mu}s. The microwave package design guidelines presented here address many issues relevant for near-term quantum processors.
Lossy dielectrics are a significant source of decoherence in superconducting quantum circuits. In this report, we model and compare the dielectric loss in bulk and interfacial dielectricsin titanium nitride (TiN) and aluminum (Al) superconducting coplanar waveguide (CPW) resonators. We fabricate isotropically trenched resonators to produce a series of device geometries that accentuate a specific dielectric region’s contribution to resonator quality factor. While each dielectric region contributes significantly to loss in TiN devices, the metal-air interface dominates the loss in the Al devices. Furthermore, we evaluate the quality factor of each TiN resonator geometry with and without a post-process hydrofluoric (HF) etch, and find that it reduced losses from the substrate-air interface, thereby improving the quality factor.
As superconducting qubit circuits become more complex, addressing a large array of qubits becomes a challenging engineering problem. Dense arrays of qubits benefit from, and may require,access via the third dimension to alleviate interconnect crowding. Through-silicon vias (TSVs) represent a promising approach to three-dimensional (3D) integration in superconducting qubit arrays — provided they are compact enough to support densely-packed qubit systems without compromising qubit performance or low-loss signal and control routing. In this work, we demonstrate the integration of superconducting, high-aspect ratio TSVs — 10 μm wide by 20 μm long by 200 μm deep — with superconducting qubits. We utilize TSVs for baseband control and high-fidelity microwave readout of qubits using a two-chip, bump-bonded architecture. We also validate the fabrication of qubits directly upon the surface of a TSV-integrated chip. These key 3D integration milestones pave the way for the control and readout of high-density superconducting qubit arrays using superconducting TSVs.
As designs for superconducting qubits become more complex, 3D integration of two or more vertically bonded chips will become necessary to enable increased density and connectivity.Precise control of the spacing between these chips is required for accurate prediction of circuit performance. In this paper, we demonstrate an improvement in the planarity of bonded superconducting qubit chips while retaining device performance by utilizing hard-stop silicon spacer posts. These silicon spacers are defined by etching several microns into a silicon substrate and are compatible with 3D-integrated qubit fabrication. This includes fabrication of Josephson junctions, superconducting air-bridge crossovers, underbump metallization and indium bumps. To qualify the integrated process, we demonstrate high-quality factor resonators on the etched surface and measure qubit coherence (T1, T2,echo > 40 {\mu}s) in the presence of silicon posts as near as 350 {\mu}m to the qubit.
Over the past two decades, the performance of superconducting quantum circuits has tremendously improved. The progress of superconducting qubits enabled a new industry branch to emergefrom global technology enterprises to quantum computing startups. Here, an overview of superconducting quantum circuit microwave control is presented. Furthermore, we discuss one of the persistent engineering challenges in the field, how to control the electromagnetic environment of increasingly complex superconducting circuits such that they are simultaneously protected and efficiently controllable.
Superconducting quantum computing architectures comprise resonators and qubits that experience energy loss due to two-level systems (TLS) in bulk and interfacial dielectrics. Understandingthese losses is critical to improving performance in superconducting circuits. In this work, we present a method for quantifying the TLS losses of different bulk and interfacial dielectrics present in superconducting coplanar waveguide (CPW) resonators. By combining statistical characterization of sets of specifically designed CPW resonators on isotropically etched silicon substrates with detailed electromagnetic modeling, we determine the separate loss contributions from individual material interfaces and bulk dielectrics. This technique for analyzing interfacial TLS losses can be used to guide targeted improvements to qubits, resonators, and their superconducting fabrication processes.
Improving the performance of superconducting qubits and resonators generally results from a combination of materials and fabrication process improvements and design modifications thatreduce device sensitivity to residual losses. One instance of this approach is to use trenching into the device substrate in combination with superconductors and dielectrics with low intrinsic losses to improve quality factors and coherence times. Here we demonstrate titanium nitride coplanar waveguide resonators with mean quality factors exceeding two million and controlled trenching reaching 2.2 μm into the silicon substrate. Additionally, we measure sets of resonators with a range of sizes and trench depths and compare these results with finite-element simulations to demonstrate quantitative agreement with a model of interface dielectric loss. We then apply this analysis to determine the extent to which trenching can improve resonator performance.