Fabrication of superconducting through-silicon vias

  1. Justin L. Mallek,
  2. Donna-Ruth W. Yost,
  3. Danna Rosenberg,
  4. Jonilyn L. Yoder,
  5. Gregory Calusine,
  6. Matt Cook,
  7. Rabindra Das,
  8. Alexandra Day,
  9. Evan Golden,
  10. David K. Kim,
  11. Jeffery Knecht,
  12. Bethany M. Niedzielski,
  13. Mollie Schwartz,
  14. Arjan Sevi,
  15. Corey Stull,
  16. Wayne Woods,
  17. Andrew J. Kerman,
  18. and William D. Oliver
Increasing circuit complexity within quantum systems based on superconducting qubits necessitates high connectivity while retaining qubit coherence. Classical micro-electronic systems
have addressed interconnect density challenges by using 3D integration with interposers containing through-silicon vias (TSVs), but extending these integration techniques to superconducting quantum systems is challenging. Here, we discuss our approach for realizing high-aspect-ratio superconducting TSVs\textemdash 10 μm wide by 20 μm long by 200 μm deep\textemdash with densities of 100 electrically isolated TSVs per square millimeter. We characterize the DC and microwave performance of superconducting TSVs at cryogenic temperatures and demonstrate superconducting critical currents greater than 20 mA. These high-aspect-ratio, high critical current superconducting TSVs will enable high-density vertical signal routing within superconducting quantum processors.

Solid-state qubits integrated with superconducting through-silicon vias

  1. Donna-Ruth W. Yost,
  2. Mollie E. Schwartz,
  3. Justin Mallek,
  4. Danna Rosenberg,
  5. Corey Stull,
  6. Jonilyn L. Yoder,
  7. Greg Calusine,
  8. Matt Cook,
  9. Rabi Das,
  10. Alexandra L. Day,
  11. Evan B. Golden,
  12. David K. Kim,
  13. Alexander Melville,
  14. Bethany M. Niedzielski,
  15. Wayne Woods,
  16. Andrew J. Kerman,
  17. and Willam D. Oliver
As superconducting qubit circuits become more complex, addressing a large array of qubits becomes a challenging engineering problem. Dense arrays of qubits benefit from, and may require,
access via the third dimension to alleviate interconnect crowding. Through-silicon vias (TSVs) represent a promising approach to three-dimensional (3D) integration in superconducting qubit arrays — provided they are compact enough to support densely-packed qubit systems without compromising qubit performance or low-loss signal and control routing. In this work, we demonstrate the integration of superconducting, high-aspect ratio TSVs — 10 μm wide by 20 μm long by 200 μm deep — with superconducting qubits. We utilize TSVs for baseband control and high-fidelity microwave readout of qubits using a two-chip, bump-bonded architecture. We also validate the fabrication of qubits directly upon the surface of a TSV-integrated chip. These key 3D integration milestones pave the way for the control and readout of high-density superconducting qubit arrays using superconducting TSVs.

Analysis and mitigation of interface losses in trenched superconducting coplanar waveguide resonators

  1. Greg Calusine,
  2. Alexander Melville,
  3. Wayne Woods,
  4. Rabindra Das,
  5. Corey Stull,
  6. Vlad Bolkhovsky,
  7. Danielle Braje,
  8. David Hover,
  9. David K. Kim,
  10. Xhovalin Miloshi,
  11. Danna Rosenberg,
  12. Arjan Sevi,
  13. Jonilyn L. Yoder,
  14. Eric A. Dauler,
  15. and William D. Oliver
Improving the performance of superconducting qubits and resonators generally results from a combination of materials and fabrication process improvements and design modifications that
reduce device sensitivity to residual losses. One instance of this approach is to use trenching into the device substrate in combination with superconductors and dielectrics with low intrinsic losses to improve quality factors and coherence times. Here we demonstrate titanium nitride coplanar waveguide resonators with mean quality factors exceeding two million and controlled trenching reaching 2.2 μm into the silicon substrate. Additionally, we measure sets of resonators with a range of sizes and trench depths and compare these results with finite-element simulations to demonstrate quantitative agreement with a model of interface dielectric loss. We then apply this analysis to determine the extent to which trenching can improve resonator performance.