Superconductor digital electronics and quantum computing with superconducting qubits are promising next-generation computing technologies. When cooled down or operated in the presenceof a nonzero background magnetic field Br, superconducting thin films comprising the circuits can trap magnetic vortices that can degrade circuit or qubit performance. In this work, we report a practical solution for eliminating flux trapped during cooldown in ambient magnetic fields, Br≤60 $\upmu$T, based on controlled local thermal gradients and moats, etched holes in the superconducting films of the circuit. Thermal gradients created by integrated on-chip resistive heaters move vortices towards the moats, where they become trapped away from circuitry regions and pinning sites. Using magnetic imaging and electrical circuit readout, we demonstrate that this approach is capable of removing magnetic flux trapped during field cooling and magnetic flux nucleated by circuit operation. If used in an environment with basic magnetic shielding, this solution is capable of suppressing all magnetic flux in a large-scale circuit, overcoming one of the long-standing challenges preventing high-performance scalable computing using superconductors.
Magnetic flux (vortex) trapping remains a major obstacle to very large scale integration in superconducting electronics. Moats — etched regions in circuit layers placed in groundplanes and around critical circuitry — offer a simple passive approach to sequester flux. Here, we systematically examine the effectiveness of moat arrays in superconducting niobium films as a function of geometry (size, shape, and density) and background magnetic field. By measuring the vortex expulsion field, we estimate the flux saturation number and flux trapping temperature for a range of geometries. We find that many moat designs effectively sequester flux in magnetically shielded environments (< 1 μT), with high-aspect-ratio rectangular "slit" moats providing the strongest mitigation at minimal area cost. However, our measurements show that moats alone do not eliminate flux trapping in non-ideal films, as vortices can preferentially pin at material defects. These results provide design guidance for flux mitigation in superconducting integrated circuits and highlight the need for combined optimization of circuit geometries and materials.[/expand]
Increasing circuit complexity within quantum systems based on superconducting qubits necessitates high connectivity while retaining qubit coherence. Classical micro-electronic systemshave addressed interconnect density challenges by using 3D integration with interposers containing through-silicon vias (TSVs), but extending these integration techniques to superconducting quantum systems is challenging. Here, we discuss our approach for realizing high-aspect-ratio superconducting TSVs\textemdash 10 μm wide by 20 μm long by 200 μm deep\textemdash with densities of 100 electrically isolated TSVs per square millimeter. We characterize the DC and microwave performance of superconducting TSVs at cryogenic temperatures and demonstrate superconducting critical currents greater than 20 mA. These high-aspect-ratio, high critical current superconducting TSVs will enable high-density vertical signal routing within superconducting quantum processors.