This white paper presents a single-layer mask, found at this https URL. It is designed for fabrication of superconducting microwave resonators towards 1:1 comparisons of dielectriclosses from the metal-substrate interface. Finite-element electromagnetic simulations are used to determine participation ratios of the four major regions of the on-chip devices, as well as to confirm lack of crosstalk between neighboring devices and demonstrate coupling tunability over three orders of magnitude. This mask is intended as an open-source community resource for facilitating precise and accurate comparisons of materials in the single-photon, millikelvin regime.
Enabling applications for solid state quantum technology will require systematically reducing noise, particularly dissipation, in these systems. Yet, when multiple decay channels arepresent in a system with similar weight, resolution to distinguish relatively small changes is necessary to infer improvements to noise levels. For superconducting qubits, uncontrolled variation of nominal performance makes obtaining such resolution challenging. Here, we approach this problem by investigating specific combinations of previously reported fabrication techniques on the quality of 242 thin film superconducting resonators and qubits. Our results quantify the influence of elementary processes on dissipation at key interfaces. We report that an end-to-end optimization of the manufacturing process that integrates multiple small improvements together can produce an average T¯¯¯¯1=76±13 μs across 24 qubits with the best qubits having T1≥110 μs. Moreover, our analysis places bounds on energy decay rates for three fabrication-related loss channels present in state-of-the-art superconducting qubits. Understanding dissipation through such systematic analysis may pave the way for lower noise solid state quantum computers.
We describe a microfabrication process for superconducting through-silicon vias appropriate for use in superconducting qubit quantum processors. With a sloped-wall via geometry, wecan use non-conformal metal deposition methods such as electron-beam evaporation and sputtering, which reliably deposit high quality superconducting films. Via superconductivity is validated by demonstrating zero via-to-via resistance below the critical temperature of aluminum.
We report on the fabrication and metrology of superconducting caps for qubit circuits. As part of a 3D quantum integrated circuit architecture, a cap chip forms the upper half of anenclosure that provides isolation, increases vacuum participation ratio, and improves performance of individual resonant elements. Here, we demonstrate that such caps can be reliably fabricated, placed on a circuit chip, and form superconducting connections to the circuit.