on the anisotropic etch of Si(111) relative to Si(110) to define atomically flat, high aspect ratio Si tunnel barriers with epitaxial superconductor contacts on the parallel side-wall surfaces. This process circumvents the challenges associated with the growth of low-loss insulating barriers on lattice matched superconductors. By implementing low-loss, intrinsic float-zone Si as the barrier material rather than commonly used, lossy Al2O3, the FinMET is expected to overcome problems with standard transmons by (1) reducing dielectric losses; (2) minimizing the formation of two-level system spectral features; (3) exhibiting greater control over barrier thickness and qubit frequency spread, especially when combined with commercial fin fabrication and atomic-layer digital etching; (4) reducing the footprint by four orders of magnitude; and (5) allowing scalable fabrication. Here, fabrication of Si fins on Si(110) substrates with shadow-deposited Al electrodes is demonstrated. The formation of FinMET devices is expected to allow tunnel junction patterning with optical lithography. This facilitates uniform fabrication on Si wafers based on existing infrastructure for fin-based devices while simultaneously avoiding lossy amorphous dielectrics for tunnel barriers.