Reducing leakage of single-qubit gates for superconducting quantum processors using analytical control pulse envelopes

  1. Eric Hyyppä,
  2. Antti Vepsäläinen,
  3. Miha Papič,
  4. Chun Fai Chan,
  5. Sinan Inel,
  6. Alessandro Landra,
  7. Wei Liu,
  8. Jürgen Luus,
  9. Fabian Marxer,
  10. Caspar Ockeloen-Korppi,
  11. Sebastian Orbell,
  12. Brian Tarasinski,
  13. and Johannes Heinsoo
Improving the speed and fidelity of quantum logic gates is essential to reach quantum advantage with future quantum computers. However, fast logic gates lead to increased leakage errors