Manufacturing low dissipation superconducting quantum processors

  1. Ani Nersisyan,
  2. Stefano Poletto,
  3. Nasser Alidoust,
  4. Riccardo Manenti,
  5. Russ Renzas,
  6. Cat-Vu Bui,
  7. Kim Vu,
  8. Tyler Whyland,
  9. Yuvraj Mohan,
  10. Eyob A. Sete,
  11. Sam Stanwyck,
  12. Andrew Bestwick,
  13. and Matthew Reagor
Enabling applications for solid state quantum technology will require systematically reducing noise, particularly dissipation, in these systems. Yet, when multiple decay channels are

Superconducting Through-Silicon Vias for Quantum Integrated Circuits

  1. Mehrnoosh Vahidpour,
  2. William O'Brien,
  3. Jon Tyler Whyland,
  4. Joel Angeles,
  5. Jayss Marshall,
  6. Diego Scarabelli,
  7. Genya Crossman,
  8. Kamal Yadav,
  9. Yuvraj Mohan,
  10. Catvu Bui,
  11. Vijay Rawat,
  12. Russ Renzas,
  13. Nagesh Vodrahalli,
  14. Andrew Bestwick,
  15. and Chad Rigetti
We describe a microfabrication process for superconducting through-silicon vias appropriate for use in superconducting qubit quantum processors. With a sloped-wall via geometry, we

Superconducting Caps for Quantum Integrated Circuits

  1. William O'Brien,
  2. Mehrnoosh Vahidpour,
  3. Jon Tyler Whyland,
  4. Joel Angeles,
  5. Jayss Marshall,
  6. Diego Scarabelli,
  7. Genya Crossman,
  8. Kamal Yadav,
  9. Yuvraj Mohan,
  10. Catvu Bui,
  11. Vijay Rawat,
  12. Russ Renzas,
  13. Nagesh Vodrahalli,
  14. Andrew Bestwick,
  15. and Chad Rigetti
We report on the fabrication and metrology of superconducting caps for qubit circuits. As part of a 3D quantum integrated circuit architecture, a cap chip forms the upper half of an