Justin L. Mallek

Mitigation of Magnetic Flux Trapping in Superconducting Electronics Using Moats

  1. Rohan T. Kapur,
  2. Sergey K. Tolpygo,
  3. Alex Wynn,
  4. Pauli Kehayias,
  5. Adam A. Libson,
  6. Collin N. Muniz,
  7. Michael J. Gold,
  8. Justin L. Mallek,
  9. Danielle A. Braje,
  10. and Jennifer M. Schloss
Magnetic flux (vortex) trapping remains a major obstacle to very large scale integration in superconducting electronics. Moats — etched regions in circuit layers placed in groundplanes and around critical circuitry — offer a simple passive approach to sequester flux. Here, we systematically examine the effectiveness of moat arrays in superconducting niobium films as a function of geometry (size, shape, and density) and background magnetic field. By measuring the vortex expulsion field, we estimate the flux saturation number and flux trapping temperature for a range of geometries. We find that many moat designs effectively sequester flux in magnetically shielded environments (< 1 μT), with high-aspect-ratio rectangular "slit" moats providing the strongest mitigation at minimal area cost. However, our measurements show that moats alone do not eliminate flux trapping in non-ideal films, as vortices can preferentially pin at material defects. These results provide design guidance for flux mitigation in superconducting integrated circuits and highlight the need for combined optimization of circuit geometries and materials.[/expand]
arxiv pdf

Fabrication of superconducting through-silicon vias

  1. Justin L. Mallek,
  2. Donna-Ruth W. Yost,
  3. Danna Rosenberg,
  4. Jonilyn L. Yoder,
  5. Gregory Calusine,
  6. Matt Cook,
  7. Rabindra Das,
  8. Alexandra Day,
  9. Evan Golden,
  10. David K. Kim,
  11. Jeffery Knecht,
  12. Bethany M. Niedzielski,
  13. Mollie Schwartz,
  14. Arjan Sevi,
  15. Corey Stull,
  16. Wayne Woods,
  17. Andrew J. Kerman,
  18. and William D. Oliver
Increasing circuit complexity within quantum systems based on superconducting qubits necessitates high connectivity while retaining qubit coherence. Classical micro-electronic systems
have addressed interconnect density challenges by using 3D integration with interposers containing through-silicon vias (TSVs), but extending these integration techniques to superconducting quantum systems is challenging. Here, we discuss our approach for realizing high-aspect-ratio superconducting TSVs\textemdash 10 μm wide by 20 μm long by 200 μm deep\textemdash with densities of 100 electrically isolated TSVs per square millimeter. We characterize the DC and microwave performance of superconducting TSVs at cryogenic temperatures and demonstrate superconducting critical currents greater than 20 mA. These high-aspect-ratio, high critical current superconducting TSVs will enable high-density vertical signal routing within superconducting quantum processors.
arxiv pdf