Wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan-style Josephson junctions for superconducting quantum processors

  1. N. Muthusubramanian,
  2. P. Duivestein,
  3. C. Zachariadis,
  4. M. Finkel,
  5. S. L. M. van der Meer,
  6. H. M. Veen,
  7. M. W. Beekman,
  8. T. Stavenga,
  9. A. Bruno,
  10. and L. DiCarlo
We investigate die-level and wafer-scale uniformity of Dolan-bridge and bridgeless Manhattan Josephson junctions, using multiple substrates with and without through-silicon vias (TSVs).
Dolan junctions fabricated on planar substrates have the highest yield and lowest room-temperature conductance spread, equivalent to ~100 MHz in transmon frequency. In TSV-integrated substrates, Dolan junctions suffer most in both yield and disorder, making Manhattan junctions preferable. Manhattan junctions show pronounced conductance decrease from wafer centre to edge, which we qualitatively capture using a geometric model of spatially-dependent resist shadowing during junction electrode evaporation. Analysis of actual junction overlap areas using scanning electron micrographs supports the model, and further points to a remnant spatial dependence possibly due to contact resistance.

Post-fabrication frequency trimming of coplanar-waveguide resonators in circuit QED quantum processors

  1. S. Vallés-Sanclemente,
  2. S. L. M. van der Meer,
  3. M. Finkel,
  4. N. Muthusubramanian,
  5. M. Beekman,
  6. H. Ali,
  7. J. F. Marques,
  8. C. Zachariadis,
  9. H. M. Veen,
  10. T. Stavenga,
  11. N. Haider,
  12. and L. DiCarlo
We present the use of grounding airbridge arrays to trim the frequency of microwave coplanar-waveguide (CPW) resonators post fabrication. This method is compatible with the fabrication
steps of conventional CPW airbridges and crossovers and increases device yield by allowing compensation of design and fabrication uncertainty with 100 MHz range and 10 MHz resolution. We showcase two applications in circuit QED. The first is elimination of frequency crowding between resonators intended to readout different transmons by frequency-division multiplexing. The second is frequency matching of readout and Purcell-filter resonator pairs. Combining this matching with transmon frequency trimming by laser annealing reliably achieves fast and high-fidelity readout across 17-transmon quantum processors.

Realization of a quantum neural network using repeat-until-success circuits in a superconducting quantum processor

  1. M. S. Moreira,
  2. G. G. Guerreschi,
  3. W. Vlothuizen,
  4. J. F. Marques,
  5. J. van Straten,
  6. S. P. Premaratne,
  7. X. Zou,
  8. H. Ali,
  9. N. Muthusubramanian,
  10. C. Zachariadis,
  11. J. van Someren,
  12. M. Beekman,
  13. N. Haider,
  14. A. Bruno,
  15. C. G. Almudever,
  16. A. Y. Matsuura,
  17. and L. DiCarlo
Artificial neural networks are becoming an integral part of digital solutions to complex problems. However, employing neural networks on quantum processors faces challenges related
to the implementation of non-linear functions using quantum circuits. In this paper, we use repeat-until-success circuits enabled by real-time control-flow feedback to realize quantum neurons with non-linear activation functions. These neurons constitute elementary building blocks that can be arranged in a variety of layouts to carry out deep learning tasks quantum coherently. As an example, we construct a minimal feedforward quantum neural network capable of learning all 2-to-1-bit Boolean functions by optimization of network activation parameters within the supervised-learning paradigm. This model is shown to perform non-linear classification and effectively learns from multiple copies of a single training state consisting of the maximal superposition of all inputs.

Logical-qubit operations in an error-detecting surface code

  1. J. F. Marques,
  2. B. M. Varbanov,
  3. M. S. Moreira,
  4. H. Ali,
  5. N. Muthusubramanian,
  6. C. Zachariadis,
  7. F. Battistel,
  8. M. Beekman,
  9. N. Haider,
  10. W. Vlothuizen,
  11. A. Bruno,
  12. B. M. Terhal,
  13. and L. DiCarlo
We realize a suite of logical operations on a distance-two logical qubit stabilized using repeated error detection cycles. Logical operations include initialization into arbitrary states,
measurement in the cardinal bases of the Bloch sphere, and a universal set of single-qubit gates. For each type of operation, we observe higher performance for fault-tolerant variants over non-fault-tolerant variants, and quantify the difference through detailed characterization. In particular, we demonstrate process tomography of logical gates, using the notion of a logical Pauli transfer matrix. This integration of high-fidelity logical operations with a scalable scheme for repeated stabilization is a milestone on the road to quantum error correction with higher-distance superconducting surface codes.

Variational preparation of finite-temperature states on a quantum computer

  1. R. Sagastizabal,
  2. S. P. Premaratne,
  3. B. A. Klaver,
  4. M. A. Rol,
  5. V. Negîrneac,
  6. M. Moreira,
  7. X. Zou,
  8. S. Johri,
  9. N. Muthusubramanian,
  10. M. Beekman,
  11. C. Zachariadis,
  12. V.P. Ostroukh,
  13. N. Haider,
  14. A. Bruno,
  15. A. Y. Matsuura,
  16. and L. DiCarlo
The preparation of thermal equilibrium states is important for the simulation of condensed-matter and cosmology systems using a quantum computer. We present a method to prepare such
mixed states with unitary operators, and demonstrate this technique experimentally using a gate-based quantum processor. Our method targets the generation of thermofield double states using a hybrid quantum-classical variational approach motivated by quantum-approximate optimization algorithms, without prior calculation of optimal variational parameters by numerical simulation. The fidelity of generated states to the thermal-equilibrium state smoothly varies from 99 to 75% between infinite and near-zero simulated temperature, in quantitative agreement with numerical simulations of the noisy quantum processor with error parameters drawn from experiment.