Impacts from high-energy particles cause correlated errors in superconducting qubits by increasing the quasiparticle density in the vicinity of the Josephson junctions (JJs). Such errorsare particularly harmful as they cannot be easily remedied via conventional error correcting codes. Recent experiments reduced correlated errors by making the difference in superconducting gap energy across the JJ larger than the qubit energy. In this work, we assess gap engineering near the JJ (δΔJJ) and the capacitor/ground-plane (δΔM1) by exposing arrays of transmon qubits to two sources of radiation. For α-particles from an 241Am source, we observe T1 errors correlated in space and time, supporting a hypothesis that hadronic cosmic rays are a major contributor to the 10−10 error floor observed in Ref. 1. For electrons from a pulsed linear accelerator, we observe temporally correlated T1 and T2 errors, this measurement is insensitive to spatial correlations. We observe that the severity of correlated T1 errors is reduced for qubit arrays with a greater degree of gap engineering at the JJ. For both T1 and T2 errors, the recovery time is hastened by an increased δΔM1, which we attribute to the trapping of quasiparticles into the capacitor/ground-plane. We construct a model of quasiparticle dynamics that qualitatively agrees with our observations. This work reinforces the multifaceted influence of radiation on superconducting qubits and provides strategies for improving radiation resilience.
Josephson tunnel junctions are essential elements of superconducting quantum circuits. The operability of these circuits presumes a 2π-periodic sinusoidal potential of a tunnel junction,but higher-order corrections to this Josephson potential, often referred to as „harmonics,“ cause deviations from the expected circuit behavior. Two potential sources for these harmonics are the intrinsic current-phase relationship of the Josephson junction and the inductance of the metallic traces connecting the junction to other circuit elements. Here, we introduce a method to distinguish the origin of the observed harmonics using nearly-symmetric superconducting quantum interference devices (SQUIDs). Spectroscopic measurements of level transitions in multiple devices reveal features that cannot be explained by a standard cosine potential, but are accurately reproduced when accounting for a second-harmonic contribution to the model. The observed scaling of the second harmonic with Josephson-junction size indicates that it is due almost entirely to the trace inductance. These results inform the design of next-generation superconducting circuits for quantum information processing and the investigation of the supercurrent diode effect.
Increasing the density of superconducting circuits requires compact components, however, superconductor-based capacitors typically perform worse as dimensions are reduced due to lossat surfaces and interfaces. Here, parallel plate capacitors composed of aluminum-contacted, crystalline silicon fins are shown to be a promising technology for use in superconducting circuits by evaluating the performance of lumped element resonators and transmon qubits. High aspect ratio Si-fin capacitors having widths below 300nm with an approximate total height of 3μm are fabricated using anisotropic wet etching of Si(110) substrates followed by aluminum metallization. The single-crystal Si capacitors are incorporated in lumped element resonators and transmons by shunting them with lithographically patterned aluminum inductors and conventional Al/AlOx/Al Josephson junctions respectively. Microwave characterization of these devices suggests state-of-the-art performance for superconducting parallel plate capacitors with low power internal quality factor of lumped element resonators greater than 500k and qubit T1 times greater than 25μs. These results suggest that Si-Fins are a promising technology for applications that require low loss, compact, superconductor-based capacitors with minimal stray capacitance.
A merged-element transmon (MET) device, based on Si fins, is proposed and the steps to form such a „FinMET“ are demonstrated. This new application of fin technology capitalizeson the anisotropic etch of Si(111) relative to Si(110) to define atomically flat, high aspect ratio Si tunnel barriers with epitaxial superconductor contacts on the parallel side-wall surfaces. This process circumvents the challenges associated with the growth of low-loss insulating barriers on lattice matched superconductors. By implementing low-loss, intrinsic float-zone Si as the barrier material rather than commonly used, lossy Al2O3, the FinMET is expected to overcome problems with standard transmons by (1) reducing dielectric losses; (2) minimizing the formation of two-level system spectral features; (3) exhibiting greater control over barrier thickness and qubit frequency spread, especially when combined with commercial fin fabrication and atomic-layer digital etching; (4) reducing the footprint by four orders of magnitude; and (5) allowing scalable fabrication. Here, fabrication of Si fins on Si(110) substrates with shadow-deposited Al electrodes is demonstrated. The formation of FinMET devices is expected to allow tunnel junction patterning with optical lithography. This facilitates uniform fabrication on Si wafers based on existing infrastructure for fin-based devices while simultaneously avoiding lossy amorphous dielectrics for tunnel barriers.