Aranya Goswami

Fabrication and characterization of low-loss Al/Si/Al parallel plate capacitors for superconducting quantum information applications

  1. Anthony McFadden,
  2. Aranya Goswami,
  3. Tongyu Zhao,
  4. Teun van Schijndel,
  5. Trevyn F.Q. Larson,
  6. Sudhir Sahu,
  7. Stephen Gill,
  8. Florent Lecocq,
  9. Raymond Simmonds,
  10. and Chris Palmstrøm
Increasing the density of superconducting circuits requires compact components, however, superconductor-based capacitors typically perform worse as dimensions are reduced due to loss
at surfaces and interfaces. Here, parallel plate capacitors composed of aluminum-contacted, crystalline silicon fins are shown to be a promising technology for use in superconducting circuits by evaluating the performance of lumped element resonators and transmon qubits. High aspect ratio Si-fin capacitors having widths below 300nm with an approximate total height of 3μm are fabricated using anisotropic wet etching of Si(110) substrates followed by aluminum metallization. The single-crystal Si capacitors are incorporated in lumped element resonators and transmons by shunting them with lithographically patterned aluminum inductors and conventional Al/AlOx/Al Josephson junctions respectively. Microwave characterization of these devices suggests state-of-the-art performance for superconducting parallel plate capacitors with low power internal quality factor of lumped element resonators greater than 500k and qubit T1 times greater than 25μs. These results suggest that Si-Fins are a promising technology for applications that require low loss, compact, superconductor-based capacitors with minimal stray capacitance.
arxiv pdf

Merged-element transmons on Si fins: the FinMET

  1. Aranya Goswami,
  2. Anthony P. McFadden,
  3. Hadass Inbar,
  4. Ruichen Zhao,
  5. Corey Rae McRae,
  6. Christopher J. Palmstrom,
  7. and David P. Pappas
A merged-element transmon (MET) device, based on Si fins, is proposed and the steps to form such a „FinMET“ are demonstrated. This new application of fin technology capitalizes
on the anisotropic etch of Si(111) relative to Si(110) to define atomically flat, high aspect ratio Si tunnel barriers with epitaxial superconductor contacts on the parallel side-wall surfaces. This process circumvents the challenges associated with the growth of low-loss insulating barriers on lattice matched superconductors. By implementing low-loss, intrinsic float-zone Si as the barrier material rather than commonly used, lossy Al2O3, the FinMET is expected to overcome problems with standard transmons by (1) reducing dielectric losses; (2) minimizing the formation of two-level system spectral features; (3) exhibiting greater control over barrier thickness and qubit frequency spread, especially when combined with commercial fin fabrication and atomic-layer digital etching; (4) reducing the footprint by four orders of magnitude; and (5) allowing scalable fabrication. Here, fabrication of Si fins on Si(110) substrates with shadow-deposited Al electrodes is demonstrated. The formation of FinMET devices is expected to allow tunnel junction patterning with optical lithography. This facilitates uniform fabrication on Si wafers based on existing infrastructure for fin-based devices while simultaneously avoiding lossy amorphous dielectrics for tunnel barriers.
arxiv pdf