Quantitative Rules for Parallel Calibration and Drift-Resilient Maintenance of Large-Scale Superconducting Quantum Processors

  1. Zhihao Wu,
  2. Kechengqi Zhu,
  3. Shichuan Xue,
  4. Xinfang Zhang,
  5. Zhaohua Yang,
  6. Zhida Zhang,
  7. Shun Hu,
  8. Cong Li,
  9. Dingdong Liu,
  10. Kangding Zhao,
  11. Peng Luo,
  12. Lingling Lao,
  13. Xiang Fu,
  14. Mingtang Deng,
  15. Junjie Wu,
  16. and Kai Lu
As superconducting quantum processors scale toward hundreds of qubits, manual calibration becomes increasingly costly and difficult to sustain. Here we address two system-level factors
governing automated calibration, namely, crosstalk induced by parallel operations and temporal drift of control parameters. On a 66-qubit superconducting processor, cross-entropy benchmarking shows that single-qubit calibration tolerates full-chip concurrency with minimal fidelity loss, whereas CZ calibration requires a minimum coupler-graph distance of four to avoid elevated control errors. Continuous monitoring of representative qubit and coupler parameters further yields quantitative refresh rules that assign refresh priority by error-budget consumption. These results turn two conventionally heuristic choices, the concurrency density of calibration tasks and the refresh priority of each control parameter, into measurable operating rules. Implemented within an automated calibration framework, the rules support a six-qubit Greenberger-Horne-Zeilinger state with a zero-noise-extrapolated fidelity of 89.64%, distance-dependent logical-error suppression in a single-cycle repetition-code benchmark, and a reduction of the mean single-qubit error from 0.023 to 0.011 on a 337-qubit processor, providing an experimentally grounded reference for the automated calibration and maintenance of current and future large-scale superconducting quantum systems.

Low-Loss, High-Coherence Airbridge Interconnects Fabricated by Single-Step Lithography

  1. Jibang Fu,
  2. Bo Ren,
  3. Jiandong Ouyang,
  4. Cong Li,
  5. Kechengqi Zhu,
  6. Yonggang Che,
  7. Xiang Fu,
  8. Shichuan Xue,
  9. Zhaohua Yang,
  10. Mingtang Deng,
  11. and Junjie Wu
Airbridges are essential for creating high-performance, low-parasitic interconnects in integrated circuits and quantum devices. Conventional multi-step fabrication methods hinder miniaturization
and introduce process-related defects. We report a simplified process for fabricating nanoscale airbridges using only a single electron-beam lithography step. By optimizing a multilayer resist stack with a triple-exposure-dose scheme and a thermal reflow step, we achieve smooth, suspended metallic bridges with sub-200-nm features that exhibit robust mechanical stability. Fabricated within a gradiometric SQUID design for superconducting transmon qubits, these airbridges introduce no measurable additional loss in the relaxation time T1, while enabling a 2.5-fold enhancement of the dephasing time T∗2. This efficient method offers a practical route toward integrating high-performance three-dimensional interconnects in advanced quantum and nano-electronic devices.

Vacuum-gap transmon qubits realized using flip-chip technology

  1. Xuegang Li,
  2. Yingshan Zhang,
  3. Chuhong Yang,
  4. Zhiyuan Li,
  5. Junhua Wang,
  6. Tang Su,
  7. Mo Chen,
  8. Yongchao Li,
  9. Chengyao Li,
  10. Zhenyu Mi,
  11. Xuehui Liang,
  12. Chenlu Wang,
  13. Zhen Yang,
  14. Yulong Feng,
  15. Kehuan Linghu,
  16. Huikai Xu,
  17. Jiaxiu Han,
  18. Weiyang Liu,
  19. Peng Zhao,
  20. Teng Ma,
  21. Ruixia Wang,
  22. Jingning Zhang,
  23. Yu Song,
  24. Pei Liu,
  25. Ziting Wang,
  26. Zhaohua Yang,
  27. Guangming Xue,
  28. Yirong Jin,
  29. and Haifeng Yu
Significant progress has been made in building large-scale superconducting quantum processors based on flip-chip technology. In this work, we use the flip-chip technology to realize
a modified transmon qubit, donated as the „flipmon“, whose large shunt capacitor is replaced by a vacuum-gap parallel plate capacitor. To further reduce the qubit footprint, we place one of the qubit pads and a single Josephson junction on the bottom chip and the other pad on the top chip which is galvanically connected with the single Josephson junction through an indium bump. The electric field participation ratio can arrive at nearly 53% in air when the vacuum-gap is about 5 microns, and thus potentially leading to a lower dielectric loss. The coherence times of the flipmons are measured in the range of 30-60 microseconds, which are comparable with that of traditional transmons with similar fabrication processes. The electric field simulation indicates that the metal-air interface’s participation ratio increases significantly and may dominate the qubit’s decoherence. This suggests that more careful surface treatment needs to be considered. No evidence shows that the indium bumps inside the flipmons cause significant decoherence. With well-designed geometry and good surface treatment, the coherence of the flipmons can be further improved.