Scaling superconducting quantum processors beyond the constraints of monolithic planar architectures is essential for fault-tolerant quantum computation. Here we demonstrate a three-dimensional(3D) integrated superconducting quantum processor in which two qubit chips are vertically stacked on opposing sides of a carrier chip and galvanically connected via multilayer flip-chip bonding. Intrachip qubit coupling is mediated by planar tunable couplers, whereas interchip coupling is enabled by vertical tunable couplers embedded in the carrier chip. Randomized benchmarking reveals simultaneous single-qubit gate fidelities of 99.87 % with negligible crosstalk, and controlled-Z gates achieve an average fidelity of 97.5 % for both intrachip and interchip operations. We further demonstrate high-fidelity Bell-state preparation and coherent generation of a four-qubit W state, confirming the architecture’s capability for interchip entanglement distribution. These results establish vertical coupling as a promising pathway toward scalable quantum processors compatible with advanced quantum error-correcting codes.
The transmon, a fabrication-friendly superconducting qubit, remains a leading candidate for scalable quantum computing. Recent advances in tunable couplers have accelerated progresstoward high-performance quantum processors. However, extending coherent interactions beyond millimeter scales to enhance quantum connectivity presents a critical challenge. Here, we introduce a hybrid-mode coupler exploiting resonator-transmon hybridization to simultaneously engineer the two lowest-frequency mode, enabling high-contrast coupling between centimeter-scale transmons. For a 1-cm coupler, our framework predicts flux-tunable XX and ZZ coupling strengths reaching 23 MHz and 100 MHz, with modulation contrasts exceeding 102 and 104, respectively, demonstrating quantitative agreement with an effective two-channel model. This work provides an efficient pathway to mitigate the inherent connectivity constraints imposed by short-range interactions, enabling transmon-based architectures compatible with hardware-efficient quantum tasks.
Broadband quantum-limited amplifiers are essential for quantum information processing, yet challenges in design and fabrication continue to hinder their widespread applications. Here,we introduce the broadband merged-element Josephson parametric amplifier in which the discrete parallel capacitor is directly integrated with the Josephson junctions. This merged-element design eliminates the shortcomings of discrete capacitors, simplifying the fabrication process, reducing the need for high-precision lithography tools, and ensuring compatibility with standard superconducting qubit fabrication procedures. Experimental results demonstrate a gain of 15 dB over a 500 MHz bandwidth, a mean saturation power of -116 dBm and near-quantum-limited noise performance. This robust readily implemented parametric amplifier holds significant promise for broader applications in superconducting quantum information and the advancement of quantum computation.