Magnetic flux (vortex) trapping remains a major obstacle to very large scale integration in superconducting electronics. Moats — etched regions in circuit layers placed in groundplanes and around critical circuitry — offer a simple passive approach to sequester flux. Here, we systematically examine the effectiveness of moat arrays in superconducting niobium films as a function of geometry (size, shape, and density) and background magnetic field. By measuring the vortex expulsion field, we estimate the flux saturation number and flux trapping temperature for a range of geometries. We find that many moat designs effectively sequester flux in magnetically shielded environments (< 1 μT), with high-aspect-ratio rectangular "slit" moats providing the strongest mitigation at minimal area cost. However, our measurements show that moats alone do not eliminate flux trapping in non-ideal films, as vortices can preferentially pin at material defects. These results provide design guidance for flux mitigation in superconducting integrated circuits and highlight the need for combined optimization of circuit geometries and materials.[/expand]
Increasing integration scale of superconductor electronics (SCE) requires employing kinetic inductors and self-shunted Josephson junctions (JJs) for miniaturizing inductors and JJs.We have been developing a ten-superconductor-layer planarized fabrication process with NbN kinetic inductors and searching for suitable self-shunted JJs to potentially replace high Josephson critical current density, Jc, Nb/Al-AlOx/Nb junctions. We report on the fabrication and electrical properties of NbN/NbNx/NbN junctions produced by reactive sputtering in Ar+N2 mixture on 200-mm wafers at 200 oC and incorporated into a planarized process with two Nb ground planes and Nb wiring layer. Here NbN is a stoichiometric nitride with superconducting critical temperature Tc =15 K and NbNx is a high resistivity, nonsuperconducting nitride deposited using a higher nitrogen partial pressure than for the NbN electrodes. For comparison, we co-fabricated Nb/NbNx/Nb JJs using the same NbNx barriers deposited at 20 oC. We varied the NbNx barrier thickness from 5 nm to 20 nm, resulting in the range of Jc from about 1 mA/um^2 down to ~10 uA/um^2, and extracted coherence length of 3 nm and 4 nm in NbNx deposited, respectively at 20 oC and 200 oC. Both types of JJs are well described by resistively and capacitively shunted junction model without any excess current. We found the Jc of NbN/NbNx/NbN JJs to be somewhat lower than of Nb/NbNx/Nb JJs with the same barrier thickness, despite a much higher Tc and energy gap of NbN than of Nb electrodes. IcRn products up to ~ 0.5 mV were obtained for JJs with Jc~ 0.6 mA/um^2. Jc(T) dependences have been measured.
Inductance of superconducting thin-film inductors and structures with linewidth down to 250 nm has been experimentally evaluated. The inductors include various striplines and microstrips,their 90-degree bends and meanders, interlayer vias, etc., typically used in superconducting digital circuits. The circuits have been fabricated by a fully planarized process with 8 niobium layers, developed at MIT Lincoln Laboratory for very large scale superconducting integrated circuits. Excellent run-to-run reproducibility and inductance uniformity of better than 1% across 200-mm wafers have been found. It has been found that the inductance per unit length of stripline and microstrip line inductors continues to grow as the inductor linewidth is reduced deep into the submicron range to the widths comparable to the film thickness and magnetic field penetration depth. It is shown that the linewidth reduction does not lead to widening of the parameter spread due to diminishing sensitivity of the inductance to the linewidth and dielectric thickness. The experimental results were compared with numeric inductance extraction using commercial software and freeware. Simulations using InductEx inductance calculator were found to give an excellent agreement with the experimental results. Methods of further miniaturization of circuit inductors for achieving circuit densities > 10^6 Josephson junctions per cm^2 are discussed.