Photon-noise-tolerant dispersive readout of a superconducting qubit using a nonlinear Purcell filter

  1. Yoshiki Sunada,
  2. Kenshi Yuki,
  3. Zhiling Wang,
  4. Takeaki Miyamura,
  5. Jesper Ilves,
  6. Kohei Matsuura,
  7. Peter A. Spring,
  8. Shuhei Tamate,
  9. Shingo Kono,
  10. and Yasunobu Nakamura
Residual noise photons in a readout resonator become a major source of dephasing for a superconducting qubit when the resonator is optimized for a fast, high-fidelity dispersive readout.
Here, we propose and demonstrate a nonlinear Purcell filter that suppresses such an undesired dephasing process without sacrificing the readout performance. When a readout pulse is applied, the filter automatically reduces the effective linewidth of the readout resonator, increasing the sensitivity of the qubit to the input field. The noise tolerance of the device we fabricated is shown to be enhanced by a factor of three relative to a device with a linear filter. The measurement rate is enhanced by another factor of three by utilizing the bifurcation of the nonlinear filter. A readout fidelity of 99.4% and a QND fidelity of 99.2% are achieved using a 40-ns readout pulse. The nonlinear Purcell filter will be an effective tool for realizing a fast, high-fidelity readout without compromising the coherence time of the qubit.

High Coherence in a Tileable 3D Integrated Superconducting Circuit Architecture

  1. Peter A. Spring,
  2. Shuxiang Cao,
  3. Takahiro Tsunoda,
  4. Giulio Campanaro,
  5. Simone D. Fasciati,
  6. James Wills,
  7. Vivek Chidambaram,
  8. Boris Shteynas,
  9. Mustafa Bakr,
  10. Paul Gow,
  11. Lewis Carpenter,
  12. James Gates,
  13. Brian Vlastakis,
  14. and Peter J. Leek
We report high qubit coherence as well as low crosstalk and single-qubit gate errors in a superconducting circuit architecture that promises to be tileable to 2D lattices of qubits.
The architecture integrates an inductively shunted cavity enclosure into a design featuring non-galvanic out-of-plane control wiring and qubits and resonators fabricated on opposing sides of a substrate. The proof-of-principle device features four uncoupled transmon qubits and exhibits average energy relaxation times T1=149(38) μs, pure echoed dephasing times Tϕ,e=189(34) μs, and single-qubit gate fidelities F=99.982(4)% as measured by simultaneous randomized benchmarking. The 3D integrated nature of the control wiring means that qubits will remain addressable as the architecture is tiled to form larger qubit lattices. Band structure simulations are used to predict that the tiled enclosure will still provide a clean electromagnetic environment to enclosed qubits at arbitrary scale.