Two-level-system (TLS) defects in amorphous dielectrics are a major source of noise and decoherence in solid-state qubits. Gate-dependent non-Markovian errors caused by TLS-qubit couplingare detrimental to fault-tolerant quantum computation and have not been rigorously treated in the existing literature. In this work, we derive the non-Markovian dynamics between TLS and qubits during a SWAP-like two-qubit gate and the associated average gate fidelity for frequency-tunable Transmon qubits. This gate dependent error model facilitates using qubits as sensors to simultaneously learn practical imperfections in both the qubit’s environment and control waveforms. We combine the-state-of-art machine learning algorithm with Moiré-enhanced swap spectroscopy to achieve robust learning using noisy experimental data. Deep neural networks are used to represent the functional map from experimental data to TLS parameters and are trained through an evolutionary algorithm. Our method achieves the highest learning efficiency and robustness against experimental imperfections to-date, representing an important step towards in-situ quantum control optimization over environmental and control defects.
Solid-state quantum coherent devices are quickly progressing. Superconducting circuits, for instance, have already been used to demonstrate prototype quantum processors comprising afew tens of quantum bits. This development also revealed that a major part of decoherence and energy loss in such devices originates from a bath of parasitic material defects. However, neither the microscopic structure of defects nor the mechanisms by which they emerge during sample fabrication are understood. Here, we present a technique to obtain information on locations of defects relative to the thin film edge of the qubit circuit. Resonance frequencies of defects are tuned by exposing the qubit sample to electric fields generated by electrodes surrounding the chip. By determining the defect’s coupling strength to each electrode and comparing it to a simulation of the field distribution, we obtain the probability at which location and at which interface the defect resides. This method is applicable to already existing samples of various qubit types, without further on-chip design changes. It provides a valuable tool for improving the material quality and nano-fabrication procedures towards more coherent quantum circuits.
Superconducting integrated circuits have demonstrated a tremendous potential to realize integrated quantum computing processors. However, the downside of the solid-state approach isthat superconducting qubits suffer strongly from energy dissipation and environmental fluctuations caused by atomic-scale defects in device materials. Further progress towards upscaled quantum processors will require improvements in device fabrication techniques which need to be guided by novel analysis methods to understand and prevent mechanisms of defect formation. Here, we present a new technique to analyse individual defects in superconducting qubits by tuning them with applied electric fields. This provides a new spectroscopy method to extract the defects‘ energy distribution, electric dipole moments, and coherence times. Moreover, it enables one to distinguish defects residing in Josephson junction tunnel barriers from those at circuit interfaces. We find that defects at circuit interfaces are responsible for about 60% of the dielectric loss in the investigated transmon qubit sample. About 40% of all detected defects are contained in the tunnel barriers of the large-area parasitic Josephson junctions that occur collaterally in shadow evaporation, and only about 3% are identified as strongly coupled defects which presumably reside in the small-area qubit tunnel junctions. The demonstrated technique provides a valuable tool to assess the decoherence sources related to circuit interfaces and to tunnel junctions that is readily applicable to standard qubit samples.
Future quantum computing systems will require cryogenic integrated circuits to control and measure millions of qubits. In this paper, we report the design and characterization of aprototype cryogenic CMOS integrated circuit that has been optimized for the control of transmon qubits. The circuit has been integrated into a quantum measurement setup and its performance has been validated through multiple quantum control experiments.