Mehrnoosh Vahidpour

Superconducting Through-Silicon Vias for Quantum Integrated Circuits

  1. Mehrnoosh Vahidpour,
  2. William O'Brien,
  3. Jon Tyler Whyland,
  4. Joel Angeles,
  5. Jayss Marshall,
  6. Diego Scarabelli,
  7. Genya Crossman,
  8. Kamal Yadav,
  9. Yuvraj Mohan,
  10. Catvu Bui,
  11. Vijay Rawat,
  12. Russ Renzas,
  13. Nagesh Vodrahalli,
  14. Andrew Bestwick,
  15. and Chad Rigetti
We describe a microfabrication process for superconducting through-silicon vias appropriate for use in superconducting qubit quantum processors. With a sloped-wall via geometry, we
can use non-conformal metal deposition methods such as electron-beam evaporation and sputtering, which reliably deposit high quality superconducting films. Via superconductivity is validated by demonstrating zero via-to-via resistance below the critical temperature of aluminum.
arxiv pdf

Superconducting Caps for Quantum Integrated Circuits

  1. William O'Brien,
  2. Mehrnoosh Vahidpour,
  3. Jon Tyler Whyland,
  4. Joel Angeles,
  5. Jayss Marshall,
  6. Diego Scarabelli,
  7. Genya Crossman,
  8. Kamal Yadav,
  9. Yuvraj Mohan,
  10. Catvu Bui,
  11. Vijay Rawat,
  12. Russ Renzas,
  13. Nagesh Vodrahalli,
  14. Andrew Bestwick,
  15. and Chad Rigetti
We report on the fabrication and metrology of superconducting caps for qubit circuits. As part of a 3D quantum integrated circuit architecture, a cap chip forms the upper half of an
enclosure that provides isolation, increases vacuum participation ratio, and improves performance of individual resonant elements. Here, we demonstrate that such caps can be reliably fabricated, placed on a circuit chip, and form superconducting connections to the circuit.
arxiv pdf