Quantum computing can become scalable through error correction, but logical error rates only decrease with system size when physical errors are sufficiently uncorrelated. During computation,unused high energy levels of the qubits can become excited, creating leakage states that are long-lived and mobile. Particularly for superconducting transmon qubits, this leakage opens a path to errors that are correlated in space and time. Here, we report a reset protocol that returns a qubit to the ground state from all relevant higher level states. We test its performance with the bit-flip stabilizer code, a simplified version of the surface code for quantum error correction. We investigate the accumulation and dynamics of leakage during error correction. Using this protocol, we find lower rates of logical errors and an improved scaling and stability of error suppression with increasing qubit number. This demonstration provides a key step on the path towards scalable quantum computing.
We demonstrate diabatic two-qubit gates with Pauli error rates down to 4.3(2)⋅10−3 in as fast as 18 ns using frequency-tunable superconducting qubits. This is achieved by synchronizingthe entangling parameters with minima in the leakage channel. The synchronization shows a landscape in gate parameter space that agrees with model predictions and facilitates robust tune-up. We test both iSWAP-like and CPHASE gates with cross-entropy benchmarking. The presented approach can be extended to multibody operations as well.
Superconducting qubits are an attractive platform for quantum computing since they have demonstrated high-fidelity quantum gates and extensibility to modest system sizes. Nonetheless,an outstanding challenge is stabilizing their energy-relaxation times, which can fluctuate unpredictably in frequency and time. Here, we use qubits as spectral and temporal probes of individual two-level-system defects to provide direct evidence that they are responsible for the largest fluctuations. This research lays the foundation for stabilizing qubit performance through calibration, design, and fabrication.
We develop a high speed on-chip flux measurement using a capacitively shunted SQUID as an embedded cryogenic transducer and apply this technique to the qualification of a near-termscalable printed circuit board (PCB) package for frequency tunable superconducting qubits. The transducer is a flux tunable LC resonator where applied flux changes the resonant frequency. We apply a microwave tone to probe this frequency and use a time-domain homodyne measurement to extract the reflected phase as a function of flux applied to the SQUID. The transducer response bandwidth is 2.6 GHz with a maximum gain of 1200∘/Φ0 allowing us to study the settling amplitude to better than 0.1%. We use this technique to characterize on-chip bias line routing and a variety of PCB based packages and demonstrate that step response settling can vary by orders of magnitude in both settling time and amplitude depending on if normal or superconducting materials are used. By plating copper PCBs in aluminum we measure a step response consistent with the packaging used for existing high-fidelity qubits.
We present a fabrication process for fully superconducting interconnects compatible with superconducting qubit technology. These interconnects allow for the 3D integration of quantumcircuits without introducing lossy amorphous dielectrics. They are composed of indium bumps several microns tall separated from an aluminum base layer by titanium nitride which serves as a diffusion barrier. We measure the whole structure to be superconducting (transition temperature of 1.1K), limited by the aluminum. These interconnects have an average critical current of 26.8mA, and mechanical shear and thermal cycle testing indicate that these devices are mechanically robust. Our process provides a method that reliably yields superconducting interconnects suitable for use with superconducting qubits.