For useful quantum computation, error-corrected machines are required that can dramatically reduce the inevitable errors experienced by physical qubits. While significant progress hasbeen made in approaching and exceeding the surface-code threshold in superconducting platforms, large gains in the logical error rate with increasing system size remain out of reach. This is due both to the large number of required physical qubits and the need to operate far below threshold. Importantly, by exploiting the biases and structure of the physical errors, this threshold can be raised. Erasure qubits achieve this by detecting certain errors at the hardware level. Dual-rail qubits encoded in superconducting cavities are a promising erasure qubit wherein the dominant error, photon loss, can be detected and converted to an erasure. In these approaches, the complete set of operations, including two qubit gates, must be high performance and preserve as much of the desirable hierarchy or bias in the errors as possible. Here, we design and realize a novel two-qubit gate for dual-rail erasure qubits based on superconducting microwave cavities. The gate is high-speed (∼500 ns duration), and yields a residual gate infidelity after error detection below 0.1%. Moreover, we experimentally demonstrate that this gate largely preserves the favorable error structure of idling dual-rail qubits, making it ideal for error correction. We measure low erasure rates of ∼0.5% per gate, as well as low and asymmetric dephasing errors that occur at least three times more frequently on control qubits compared to target qubits. Bit-flip errors are practically nonexistent, bounded at the few parts per million level. This error asymmetry has not been well explored but is extremely useful in quantum error correction and flag-qubit contexts, where it can create a faster path to effective error-corrected systems.
Quantum control of a linear oscillator using a static dispersive coupling to a nonlinear ancilla underpins a wide variety of experiments in circuit QED. Extending this control to morethan one oscillator while minimizing the required connectivity to the ancilla would enable hardware-efficient multi-mode entanglement and measurements. We show that the spectrum of an ancilla statically coupled to a single mode can be made to depend on the joint photon number in two modes by applying a strong parametric beamsplitter coupling between them. This `joint-photon number-splitting‘ regime extends single-oscillator techniques to two-oscillator control, which we use to realize a hardware-efficient erasure check for a dual-rail qubit encoded in two superconducting cavities. By leveraging the beamsplitter coupling already required for single-qubit gates, this scheme permits minimal connectivity between circuit elements. Furthermore, the flexibility to choose the pulse shape allows us to limit the susceptibility to different error channels. We use this scheme to detect leakage errors with a missed erasure fraction of (9.0±0.5)×10−4, while incurring an erasure rate of 2.92±0.01% and a Pauli error rate of 0.31±0.01%, both of which are dominated by cavity errors.
A critical challenge in developing scalable error-corrected quantum systems is the accumulation of errors while performing operations and measurements. One promising approach is todesign a system where errors can be detected and converted into erasures. A recent proposal aims to do this using a dual-rail encoding with superconducting cavities. In this work, we implement such a dual-rail cavity qubit and use it to demonstrate a projective logical measurement with erasure detection. We measure logical state preparation and measurement errors at the 0.01%-level and detect over 99% of cavity decay events as erasures. We use the precision of this new measurement protocol to distinguish different types of errors in this system, finding that while decay errors occur with probability ∼0.2% per microsecond, phase errors occur 6 times less frequently and bit flips occur at least 170 times less frequently. These findings represent the first confirmation of the expected error hierarchy necessary to concatenate dual-rail erasure qubits into a highly efficient erasure code.
The design of quantum hardware that reduces and mitigates errors is essential for practical quantum error correction (QEC) and useful quantum computations. To this end, we introducethe circuit-QED dual-rail qubit in which our physical qubit is encoded in the single-photon subspace of two superconducting cavities. The dominant photon loss errors can be detected and converted into erasure errors, which are much easier to correct. In contrast to linear optics, a circuit-QED implementation of the dual-rail code offers completely new capabilities. Using a single transmon ancilla, we describe a universal gate set that includes state preparation, logical readout, and parametrizable single and two-qubit gates. Moreover, first-order hardware errors due to the cavity and transmon in all of these operations can be detected and converted to erasure errors, leaving background Pauli errors that are orders of magnitude smaller. Hence, the dual-rail cavity qubit delivers an optimal hierarchy of errors and rates, and is expected to be well below the relevant QEC thresholds with today’s devices.
Bosonic quantum error correction has proven to be a successful approach for extending the coherence of quantum memories, but to execute deep quantum circuits, high-fidelity gates betweenencoded qubits are needed. To that end, we present a family of error-detectable two-qubit gates for a variety of bosonic encodings. From a new geometric framework based on a „Bloch sphere“ of bosonic operators, we construct ZZL(θ) and eSWAP(θ) gates for the binomial, 4-legged cat, dual-rail and several other bosonic codes. The gate Hamiltonian is simple to engineer, requiring only a programmable beamsplitter between two bosonic qubits and an ancilla dispersively coupled to one qubit. This Hamiltonian can be realized in circuit QED hardware with ancilla transmons and microwave cavities. The proposed theoretical framework was developed for circuit QED but is generalizable to any platform that can effectively generate this Hamiltonian. Crucially, one can also detect first-order errors in the ancilla and the bosonic qubits during the gates. We show that this allows one to reach error-detected gate fidelities at the 10−4 level with today’s hardware, limited only by second-order hardware errors.