Superinductors have become a crucial component in the superconducting circuit toolbox, playing a key role in the development of more robust qubits. Enhancing the performance of thesedevices can be achieved by suspending the superinductors from the substrate, thereby reducing stray capacitance. Here, we present a fabrication framework for constructing superconducting circuits with suspended superinductors in planar architectures. To validate the effectiveness of this process, we systematically characterize both resonators and qubits with suspended arrays of Josephson junctions, ultimately confirming the high quality of the superinductive elements. In addition, this process is broadly compatible with other types of superinductors and circuit designs. Our results not only pave the way for scalable novel superconducting architectures but also provide the primitive for future investigation of loss mechanisms associated with the device substrate.
Correlated errors in superconducting circuits due to nonequilibrium quasiparticles are a notable concern in efforts to achieve fault tolerant quantum computing. The propagation of quasiparticlescausing these correlated errors can potentially be mediated by phonons in the substrate. Therefore, methods that decouple devices from the substrate are possible solutions, such as isolating devices atop SiN membranes. In this work, we validate the compatibility of SiN membrane technology with high quality superconducting circuits, adding the technique to the community’s fabrication toolbox. We do so by fabricating superconducting coplanar waveguide resonators entirely atop a thin (∼110 nm) SiN layer, where the bulk Si originally supporting it has been etched away, achieving a suspended membrane where the shortest length to its thickness yields an aspect ratio of approximately 7.4×103. We compare these membrane resonators to on-substrate resonators on the same chip, finding similar internal quality factors ∼105 at single photon levels. Furthermore, we confirm that these membranes do not adversely affect the resonator thermalization rate. With these important benchmarks validated, this technique can be extended to qubits.
The technological development of hardware heading toward universal fault-tolerant quantum computation requires a large-scale processing unit with high performance. While fluxonium qubitsare promising with high coherence and large anharmonicity, their scalability has not been systematically explored. In this work, we propose a superconducting quantum information processor based on compact high-coherence fluxoniums with suppressed crosstalk, reduced design complexity, improved operational efficiency, high-fidelity gates, and resistance to parameter fluctuations. In this architecture, the qubits are readout dispersively using individual resonators connected to a common bus and manipulated via combined on-chip RF and DC control lines, both of which can be designed to have low crosstalk. A multi-path coupling approach enables exchange interactions between the high-coherence computational states and at the same time suppresses the spurious static ZZ rate, leading to fast and high-fidelity entangling gates. We numerically investigate the cross resonance controlled-NOT and the differential AC-Stark controlled-Z operations, revealing low gate error for qubit-qubit detuning bandwidth of up to 1 GHz. Our study on frequency crowding indicates high fabrication yield for quantum processors consisting of over thousands of qubits. In addition, we estimate low resource overhead to suppress logical error rate using the XZZX surface code. These results promise a scalable quantum architecture with high performance for the pursuit of universal quantum computation.