Superconducting integrated random access quantum memory

  1. Aleksei R. Matanin,
  2. Nikita S. Smirnov,
  3. Anton I. Ivanov,
  4. Victor I. Polozov,
  5. Daria A. Moskaleva,
  6. Elizaveta I. Malevannaya,
  7. Margarita V. Androshuk,
  8. Maksim I. Teleganov,
  9. Yulia A. Agafonova,
  10. Denis E. Shirokov,
  11. Alexander V. Andriyash,
  12. and Ilya A. Rodionov
Microwave quantum memory represents a critical component for the development of quantum repeaters and resource-efficient quantum processors. We report the experimental realization of
a novel architecture of superconducting random access quantum memory with cycling storage time, achieved through pulsed control of an RF-SQUID coupling element. The device demonstrates a memory cycle time of 1.51 μs and achieves 57.5\% fidelity with preservation of the input pulse shape during the first retrieval interval for near-single-photon level excitations, with subsequent exponential decay characterized by a time constant of 11.44 μs. This performance represents a several-fold improvement over previously reported implementations. Crucially, we establish that while the proposed active coupler realization introduces no measurable fidelity degradation, the primary limitation arises from impedance matching imperfections. These results highlight the potential of proposed architecture for quantum memory applications while identifying specific avenues for near-unity storage fidelity.

Wafer-scale uniformity improvement of Dolan-bridge Josephson junctions by optimization of shadow evaporation technique

  1. Daria A. Moskaleva,
  2. Dmitry O. Moskalev,
  3. Nikita D. Korshakov,
  4. Anastasiya A. Solovyova,
  5. Nikita S. Smirnov,
  6. Maksim I. Teleganov,
  7. and Ilya A. Rodionov
One of the practical limitations of solid-state quantum computer manufacturing is the low reproducibility of the superconducting qubits resonance frequency. It makes hard demands on
the Josephson junction fabrication process, producing a nonlinear inductance of the qubit. In this work, we demonstrate for 100 mm wafer decreasing of the room temperature resistance variation coefficient to 6.0% for 150×170 nm2 Al/AlOx/Al Josephson junction area and to 4.0% for 150×670 nm2 Al/AlOx/Al Josephson junction area. These results were achieved by the development of the shadow evaporation process model considering the Josephson junction area variation on the wafer. Our model allows us to provide the junction area variation coefficient of about 1.0% for Josephson junction characteristic dimensions from 100 nm to 700 nm. In addition, we show the junction oxidation technic optimization. Our improvements can be scalable on the wafer with a large diameter, which allows to manufacturing of the quantum processor with high reproducibility of electrical parameters.