J.-P. Kaikkonen

Qubit-compatible substrates with superconducting through-silicon vias

  1. K. Grigoras,
  2. N. Yurttagül,
  3. J.-P. Kaikkonen,
  4. E. T. Mannila,
  5. P. Eskelinen,
  6. D. P. Lozano,
  7. H.-X. Li,
  8. M. Rommel,
  9. D. Shiri,
  10. N. Tiencken,
  11. S. Simbierowicz,
  12. A. Ronzani,
  13. J. Hätinen,
  14. D. Datta,
  15. V. Vesterinen,
  16. L. Grönberg,
  17. J. Biznárová,
  18. A. Fadavi Roudsari,
  19. S. Kosen,
  20. A. Osman,
  21. J. Hassel,
  22. J. Bylander,
  23. and J. Govenius
We fabricate and characterize superconducting through-silicon vias and electrodes suitable for superconducting quantum processors. We measure internal quality factors of a million for
test resonators excited at single-photon levels, when vias are used to stitch ground planes on the front and back sides of the wafer. This resonator performance is on par with the state of the art for silicon-based planar solutions, despite the presence of vias. Via stitching of ground planes is an important enabling technology for increasing the physical size of quantum processor chips, and is a first step toward more complex quantum devices with three-dimensional integration.
arxiv pdf