Post-fabrication frequency trimming of coplanar-waveguide resonators in circuit QED quantum processors

  1. S. Vallés-Sanclemente,
  2. S. L. M. van der Meer,
  3. M. Finkel,
  4. N. Muthusubramanian,
  5. M. Beekman,
  6. H. Ali,
  7. J. F. Marques,
  8. C. Zachariadis,
  9. H. M. Veen,
  10. T. Stavenga,
  11. N. Haider,
  12. and L. DiCarlo
We present the use of grounding airbridge arrays to trim the frequency of microwave coplanar-waveguide (CPW) resonators post fabrication. This method is compatible with the fabrication

All-microwave leakage reduction units for quantum error correction with superconducting transmon qubits

  1. J. F. Marques,
  2. H. Ali,
  3. B. M. Varbanov,
  4. M. Finkel,
  5. H. M. Veen,
  6. S. L. M. van der Meer,
  7. S. Valles-Sanclemente,
  8. N. Muthusubramanian,
  9. M. Beekman,
  10. N. Haider,
  11. B. M. Terhal,
  12. and L. DiCarlo
Minimizing leakage from computational states is a challenge when using many-level systems like superconducting quantum circuits as qubits. We realize and extend the quantum-hardware-efficient,

Realization of a quantum neural network using repeat-until-success circuits in a superconducting quantum processor

  1. M. S. Moreira,
  2. G. G. Guerreschi,
  3. W. Vlothuizen,
  4. J. F. Marques,
  5. J. van Straten,
  6. S. P. Premaratne,
  7. X. Zou,
  8. H. Ali,
  9. N. Muthusubramanian,
  10. C. Zachariadis,
  11. J. van Someren,
  12. M. Beekman,
  13. N. Haider,
  14. A. Bruno,
  15. C. G. Almudever,
  16. A. Y. Matsuura,
  17. and L. DiCarlo
Artificial neural networks are becoming an integral part of digital solutions to complex problems. However, employing neural networks on quantum processors faces challenges related

Logical-qubit operations in an error-detecting surface code

  1. J. F. Marques,
  2. B. M. Varbanov,
  3. M. S. Moreira,
  4. H. Ali,
  5. N. Muthusubramanian,
  6. C. Zachariadis,
  7. F. Battistel,
  8. M. Beekman,
  9. N. Haider,
  10. W. Vlothuizen,
  11. A. Bruno,
  12. B. M. Terhal,
  13. and L. DiCarlo
We realize a suite of logical operations on a distance-two logical qubit stabilized using repeated error detection cycles. Logical operations include initialization into arbitrary states,

High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor

  1. V. Negîrneac,
  2. H. Ali,
  3. N. Muthusubramanian,
  4. F. Battistel,
  5. R. Sagastizabal,
  6. M. S. Moreira,
  7. J. F. Marques,
  8. W. Vlothuizen,
  9. M. Beekman,
  10. N. Haider,
  11. A. Bruno,
  12. and L. DiCarlo
We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled-Z (CZ) gates by baseband flux control of transmon frequency. SNZ CZ gates operate at the speed limit