Bridging the gap between quantum software and hardware, recent research proposed a quantum control microarchitecture QuMA which implements the quantum microinstruction set QuMIS. However,QuMIS does not offer feedback control, and is tightly bound to the hardware implementation. Also, as the number of qubits grows, QuMA cannot fetch and execute instructions fast enough to apply all operations on qubits on time. Known as the quantum operation issue rate problem, this limitation is aggravated by the low information density of QuMIS instructions.
In this paper, we propose an executable quantum instruction set architecture (QISA), called eQASM, that can be translated from the quantum assembly language (QASM), supports feedback, and is executed on a quantum control microarchitecture. eQASM alleviates the quantum operation issue rate problem by efficient timing specification, single-operation-multiple-qubit execution, and a very-long-instruction-word architecture. The definition of eQASM focuses on the assembly level to be expressive. Quantum operations are configured at compile time instead of being defined at QISA design time. We instantiate eQASM into a 32-bit instruction set targeting a seven-qubit superconducting quantum processor. We validate our design by performing several experiments on a two-qubit quantum processor.
Quantum computers promise to solve certain problems that are intractable for classical computers, such as factoring large numbers and simulating quantum systems. To date, research inquantum computer engineering has focused primarily at opposite ends of the required system stack: devising high-level programming languages and compilers to describe and optimize quantum algorithms, and building reliable low-level quantum hardware. Relatively little attention has been given to using the compiler output to fully control the operations on experimental quantum processors. Bridging this gap, we propose and build a prototype of a flexible control microarchitecture supporting quantum-classical mixed code for a superconducting quantum processor. The microarchitecture is based on three core elements: (i) a codeword-based event control scheme, (ii) queue-based precise event timing control, and (iii) a flexible multilevel instruction decoding mechanism for control. We design a set of quantum microinstructions that allows flexible control of quantum operations with precise timing. We demonstrate the microarchitecture and microinstruction set by performing a standard gate-characterization experiment on a transmon qubit.
We present a tuneup protocol for qubit gates with tenfold speedup over traditional methods reliant on qubit initialization by energy relaxation. This speedup is achieved by constructinga cost function for Nelder-Mead optimization from real-time correlation of non-demolition measurements interleaving gate operations without pause. Applying the protocol on a transmon qubit achieves 0.999 average Clifford fidelity in one minute, as independently verified using randomized benchmarking and gate set tomography. The adjustable sensitivity of the cost function allows detecting fractional changes in gate error with nearly constant signal-to-noise ratio. The restless concept demonstrated can be readily extended to the tuneup of two-qubit gates and measurement operations.
We present two pulse schemes for actively depleting measurement photons from a readout resonator in the nonlinear dispersive regime of circuit QED. One method uses digital feedbackconditioned on the measurement outcome while the other is unconditional. In the absence of analytic forms and symmetries to exploit in this nonlinear regime, the depletion pulses are numerically optimized using the Powell method. We shorten the photon depletion time by more than six inverse resonator linewidths compared to passive depletion by waiting. We quantify the benefit by emulating an ancilla qubit performing repeated quantum parity checks in a repetition code. Fast depletion increases the mean number of cycles to a spurious error detection event from order 1 to 75 at a 1 microsecond cycle time.