Real-time waveform generation supports dynamic quantum circuits without pre-storing complete waveforms for every execution path. However, long-lived distortions in flux-control linesdegrade gate fidelity, requiring compensation to account for the actual pulse history. A frequency-domain inversion and time-domain fitting method is proposed for resource-efficient real-time flux distortion compensation. The method fits the reconstructed compensation impulse response with a compact hybrid infinite impulse response (IIR) and finite impulse response (FIR) filter. Look-ahead parallelization enables this filter to process synthesized waveforms at 1.2GSa/s on a field-programmable gate array (FPGA). Two-qubit cross-entropy benchmarking shows that real-time IIR filtering achieves a median controlled-Z Pauli fidelity close to the software-reference value of 99.57%. Numerical analysis and FPGA synthesis indicate approximately logarithmic growth in hardware resource use with compensation timescale. Extending compensation from microsecond to hundred-microsecond timescales increases look-up table (LUT) and digital signal processing (DSP) resource use by only about 14% and 4%, respectively, while maintaining a relative arithmetic error below 10−4. This work provides a scalable hardware foundation for high-fidelity flux control in dynamic superconducting quantum circuits.
Spectator-induced leakage poses a fundamental challenge to scalable quantum computing, particularly as frequency collisions become unavoidable in multi-qubit processors. We introducea leakage mitigation strategy based on dynamically reshaping the system Hamiltonian. Our technique utilizes a tunable coupler to enforce a block-diagonal structure on the effective Hamiltonian governing near-resonant spectator interactions, confining the gate dynamics to a two-dimensional invariant subspace and thus preventing leakage by construction. On a multi-qubit superconducting processor, we experimentally demonstrate that this dynamic control scheme suppresses leakage rates to the order of 10−4 across a wide near-resonant detuning range. The method also scales effectively with the number of spectators. With three simultaneous spectators, the total leakage remains below the threshold relevant for surface code error correction. This approach eases the tension between dense frequency packing and high-fidelity gate operation, establishing dynamic Hamiltonian engineering as an essential tool for advancing fault-tolerant quantum computing.
Optimizing the frequency configuration of qubits and quantum gates in superconducting quantum chips presents a complex NP-complete optimization challenge. This process is critical forenabling practical control while minimizing decoherence and suppressing significant crosstalk. In this paper, we propose a neural network-based frequency configuration approach. A trained neural network model estimates frequency configuration errors, and an intermediate optimization strategy identifies optimal configurations within localized regions of the chip. The effectiveness of our method is validated through randomized benchmarking and cross-entropy benchmarking. Furthermore, we design a crosstalk-aware hardware-efficient ansatz for variational quantum eigensolvers, achieving improved energy computations.