Spectator Leakage Elimination in CZ Gates via Tunable Coupler Interference on a Superconducting Quantum Processor

  1. Peng Wang,
  2. Bin-Han Lu,
  3. Tian-Le Wang,
  4. Sheng Zhang,
  5. Zhao-Yun Chen,
  6. Hai-Feng Zhang,
  7. Ren-Ze Zhao,
  8. Xiao-Yan Yang,
  9. Ze-An Zhao,
  10. Zhuo-Zhi Zhang,
  11. Xiang-Xiang Song,
  12. Yu-Chun Wu,
  13. Peng Duan,
  14. and Guo-Ping Guo
Spectator-induced leakage poses a fundamental challenge to scalable quantum computing, particularly as frequency collisions become unavoidable in multi-qubit processors. We introduce
a leakage mitigation strategy based on dynamically reshaping the system Hamiltonian. Our technique utilizes a tunable coupler to enforce a block-diagonal structure on the effective Hamiltonian governing near-resonant spectator interactions, confining the gate dynamics to a two-dimensional invariant subspace and thus preventing leakage by construction. On a multi-qubit superconducting processor, we experimentally demonstrate that this dynamic control scheme suppresses leakage rates to the order of 10−4 across a wide near-resonant detuning range. The method also scales effectively with the number of spectators. With three simultaneous spectators, the total leakage remains below the threshold relevant for surface code error correction. This approach eases the tension between dense frequency packing and high-fidelity gate operation, establishing dynamic Hamiltonian engineering as an essential tool for advancing fault-tolerant quantum computing.

Neural Network-Based Frequency Optimization for Superconducting Quantum Chips

  1. Bin-han Lu,
  2. Peng Wang,
  3. Yu-chun Wu,
  4. Guo-ping Guo,
  5. and Zhao-yun Chen
Optimizing the frequency configuration of qubits and quantum gates in superconducting quantum chips presents a complex NP-complete optimization challenge. This process is critical for
enabling practical control while minimizing decoherence and suppressing significant crosstalk. In this paper, we propose a neural network-based frequency configuration approach. A trained neural network model estimates frequency configuration errors, and an intermediate optimization strategy identifies optimal configurations within localized regions of the chip. The effectiveness of our method is validated through randomized benchmarking and cross-entropy benchmarking. Furthermore, we design a crosstalk-aware hardware-efficient ansatz for variational quantum eigensolvers, achieving improved energy computations.