We present a comprehensive architectural analysis for a fault-tolerant quantum computer based on cat codes concatenated with outer quantum error-correcting codes. For the physical hardware,we propose a system of acoustic resonators coupled to superconducting circuits with a two-dimensional layout. Using estimated near-term physical parameters for electro-acoustic systems, we perform a detailed error analysis of measurements and gates, including CNOT and Toffoli gates. Having built a realistic noise model, we numerically simulate quantum error correction when the outer code is either a repetition code or a thin rectangular surface code. Our next step toward universal fault-tolerant quantum computation is a protocol for fault-tolerant Toffoli magic state preparation that significantly improves upon the fidelity of physical Toffoli gates at very low qubit cost. To achieve even lower overheads, we devise a new magic-state distillation protocol for Toffoli states. Combining these results together, we obtain realistic full-resource estimates of the physical error rates and overheads needed to run useful fault-tolerant quantum algorithms. We find that with around 1,000 superconducting circuit components, one could construct a fault-tolerant quantum computer that can run circuits which are intractable for classical supercomputers. Hardware with 32,000 superconducting circuit components, in turn, could simulate the Hubbard model in a regime beyond the reach of classical computing.
The code capacity threshold for error correction using qubits which exhibit asymmetric or biased noise channels is known to be much higher than with qubits without such structured noise.However, it is unclear how much this improvement persists when realistic circuit level noise is taken into account. This is because implementations of gates which do not commute with the dominant error un-bias the noise channel. In particular, a native bias-preserving controlled-NOT (CX) gate, which is an essential ingredient of stabilizer codes, is not possible in strictly two-level systems. Here we overcome the challenge of implementing a bias-preserving CX gate by using stabilized cat qubits in driven nonlinear oscillators. The physical noise channel of this qubit is biased towards phase-flips, which increase linearly with the size of the cat, while bit-flips are exponentially suppressed with cat size. Remarkably, the error channel of this native CX gate between two such cat qubits is also dominated by phase-flips, while bit-flips remain exponentially suppressed. This CX gate relies on the topological phase that arises from the rotation of the cat qubit in phase space. The availability of bias-preserving CX gates opens a path towards fault-tolerant codes tailored to biased-noise cat qubits with high threshold and low overhead. As an example, we analyze a scheme for concatenated error correction using cat qubits. We find that the availability of CX gates with moderately sized cat qubits, having mean photon number <10, improves a rigorous lower bound on the fault-tolerance threshold by a factor of two and decreases the overhead in logical Clifford operations by a factor of 5. We expect these estimates to improve significantly with further optimization and with direct use of other codes such as topological codes tailored to biased noise.[/expand]