We present a three-node quantum communication testbed with a triangular topology, each side of the triangle formed by a 1.3-meter-long transmission line. We demonstrate state transferand entanglement generation between any two nodes, generate genuine multipartite entangled GHZ states, and implement quantum secret sharing (QSS) of classical information. Our experiments show that the QSS protocol can effectively detect eavesdropping, ensuring the secure sharing of secrets. This device forms a testbed for robust and secure quantum networking, enabling testing of more advanced quantum communication protocols.
Quantum processors based on superconducting qubits are being scaled to larger qubit numbers, enabling the implementation of small-scale quantum error correction codes. However, catastrophicchip-scale correlated errors have been observed in these processors, attributed to e.g. cosmic ray impacts, which challenge conventional error-correction codes such as the surface code. These events are characterized by a temporary but pronounced suppression of the qubit energy relaxation times. Here, we explore the potential for modular quantum computing architectures to mitigate such correlated energy decay events. We measure cosmic ray-like events in a quantum processor comprising a motherboard and two flip-chip bonded daughterboard modules, each module containing two superconducting qubits. We monitor the appearance of correlated qubit decay events within a single module and across the physically separated modules. We find that while decay events within one module are strongly correlated (over 85%), events in separate modules only display ∼2% correlations. We also report coincident decay events in the motherboard and in either of the two daughterboard modules, providing further insight into the nature of these decay events. These results suggest that modular architectures, combined with bespoke error correction codes, offer a promising approach for protecting future quantum processors from chip-scale correlated errors.
Superconducting qubits provide a promising approach to large-scale fault-tolerant quantum computing. However, qubit connectivity on a planar surface is typically restricted to onlya few neighboring qubits. Achieving longer-range and more flexible connectivity, which is particularly appealing in light of recent developments in error-correcting codes, however usually involves complex multi-layer packaging and external cabling, which is resource-intensive and can impose fidelity limitations. Here, we propose and realize a high-speed on-chip quantum processor that supports reconfigurable all-to-all coupling with a large on-off ratio. We implement the design in a four-node quantum processor, built with a modular design comprising a wiring substrate coupled to two separate qubit-bearing substrates, each including two single-qubit nodes. We use this device to demonstrate reconfigurable controlled-Z gates across all qubit pairs, with a benchmarked average fidelity of 96.00%±0.08% and best fidelity of 97.14%±0.07%, limited mainly by dephasing in the qubits. We also generate multi-qubit entanglement, distributed across the separate modules, demonstrating GHZ-3 and GHZ-4 states with fidelities of 88.15%±0.24% and 75.18%±0.11%, respectively. This approach promises efficient scaling to larger-scale quantum circuits, and offers a pathway for implementing quantum algorithms and error correction schemes that benefit from enhanced qubit connectivity.
In circuit quantum electrodynamics (QED), qubits are typically measured using dispersively-coupled readout resonators. Coupling between each readout resonator and its electrical environmenthowever reduces the qubit lifetime via the Purcell effect. Inserting a Purcell filter counters this effect while maintaining high readout fidelity, but reduces measurement bandwidth and thus limits multiplexing readout capacity. In this letter, we develop and implement a multi-stage bandpass Purcell filter that yields better qubit protection while simultaneously increasing measurement bandwidth and multiplexed capacity. We report on the experimental performance of our transmission-line–based implementation of this approach, a flexible design that can easily be integrated with current scaled-up, long coherence time superconducting quantum processors.