Demonstration of nonstoquastic Hamiltonian in coupled superconducting flux qubits

  1. I. Ozfidan,
  2. C. Deng,
  3. A. Y. Smirnov,
  4. T. Lanting,
  5. R. Harris,
  6. L. Swenson,
  7. J. Whittaker,
  8. F. Altomare,
  9. M. Babcock,
  10. C. Baron,
  11. A.J. Berkley,
  12. K. Boothby,
  13. H. Christiani,
  14. P. Bunyk,
  15. C. Enderud,
  16. B. Evert,
  17. M. Hager,
  18. J. Hilton,
  19. S. Huang,
  20. E. Hoskinson,
  21. M.W. Johnson,
  22. K. Jooya,
  23. E. Ladizinsky,
  24. N. Ladizinsky,
  25. R. Li,
  26. A. MacDonald,
  27. D. Marsden,
  28. G. Marsden,
  29. T. Medina,
  30. R. Molavi,
  31. R. Neufeld,
  32. M. Nissen,
  33. M. Norouzpour,
  34. T. Oh,
  35. I. Pavlov,
  36. I. Perminov,
  37. G. Poulin-Lamarre,
  38. M. Reis,
  39. T. Prescott,
  40. C. Rich,
  41. Y. Sato,
  42. G. Sterling,
  43. N. Tsai,
  44. M. Volkmann,
  45. W. Wilkinson,
  46. J. Yao,
  47. and M.H. Amin
Quantum annealing (QA) is a heuristic algorithm for finding low-energy configurations of a system, with applications in optimization, machine learning, and quantum simulation. Up to
now, all implementations of QA have been limited to qubits coupled via a single degree of freedom. This gives rise to a stoquastic Hamiltonian that has no sign problem in quantum Monte Carlo (QMC) simulations. In this paper, we report implementation and measurements of two superconducting flux qubits coupled via two canonically conjugate degrees of freedom (charge and flux) to achieve a nonstoquastic Hamiltonian. Such coupling can enhance performance of QA processors, extend the range of quantum simulations. We perform microwave spectroscopy to extract circuit parameters and show that the charge coupling manifests itself as a YY interaction in the computational basis. We observe destructive interference in quantum coherent oscillations between the computational basis states of the two-qubit system. Finally, we show that the extracted Hamiltonian is nonstoquastic over a wide range of parameters.

Architectural considerations in the design of a superconducting quantum annealing processor

  1. P. I. Bunyk,
  2. E. Hoskinson,
  3. M.W. Johnson,
  4. E. Tolkacheva,
  5. F. Altomare,
  6. A.J. Berkley,
  7. R. Harris,
  8. J.P. Hilton,
  9. T. Lanting,
  10. and J. Whittaker
. Implementing"]this type of processor at a scale of 512 qubits and 1472 programmable inter-qubit couplers and operating at ~ 20 mK has required attention to a number of considerations that one may ignore at the smaller scale of a few dozen or so devices. Here we discuss some of these considerations, and the delicate balance necessary for the construction of a practical processor that respects the demanding physical requirements imposed by a quantum algorithm. In particular we will review some of the design trade-offs at play in the floor-planning of the physical layout, driven by the desire to have an algorithmically useful set of inter-qubit couplers, and the simultaneous need to embed programmable control circuitry into the processor fabric. In this context we have developed a new ultra-low power embedded superconducting digital-to-analog flux converters (DACs) used to program the processor with zero static power dissipation, optimized to achieve maximum flux storage density per unit area. The 512 single-stage, 3520 two-stage, and 512 three-stage flux-DACs are controlled with an XYZ addressing scheme requiring 56 wires. Our estimate of on-chip dissipated energy for worst-case reprogramming of the whole processor is ~ 65 fJ. Several chips based on this architecture have been fabricated and operated successfully at our facility, as well as two outside facilities (see for example [2]).