Solid-state quantum coherent devices are quickly progressing. Superconducting circuits, for instance, have already been used to demonstrate prototype quantum processors comprising afew tens of quantum bits. This development also revealed that a major part of decoherence and energy loss in such devices originates from a bath of parasitic material defects. However, neither the microscopic structure of defects nor the mechanisms by which they emerge during sample fabrication are understood. Here, we present a technique to obtain information on locations of defects relative to the thin film edge of the qubit circuit. Resonance frequencies of defects are tuned by exposing the qubit sample to electric fields generated by electrodes surrounding the chip. By determining the defect’s coupling strength to each electrode and comparing it to a simulation of the field distribution, we obtain the probability at which location and at which interface the defect resides. This method is applicable to already existing samples of various qubit types, without further on-chip design changes. It provides a valuable tool for improving the material quality and nano-fabrication procedures towards more coherent quantum circuits.
Superconducting integrated circuits have demonstrated a tremendous potential to realize integrated quantum computing processors. However, the downside of the solid-state approach isthat superconducting qubits suffer strongly from energy dissipation and environmental fluctuations caused by atomic-scale defects in device materials. Further progress towards upscaled quantum processors will require improvements in device fabrication techniques which need to be guided by novel analysis methods to understand and prevent mechanisms of defect formation. Here, we present a new technique to analyse individual defects in superconducting qubits by tuning them with applied electric fields. This provides a new spectroscopy method to extract the defects‘ energy distribution, electric dipole moments, and coherence times. Moreover, it enables one to distinguish defects residing in Josephson junction tunnel barriers from those at circuit interfaces. We find that defects at circuit interfaces are responsible for about 60% of the dielectric loss in the investigated transmon qubit sample. About 40% of all detected defects are contained in the tunnel barriers of the large-area parasitic Josephson junctions that occur collaterally in shadow evaporation, and only about 3% are identified as strongly coupled defects which presumably reside in the small-area qubit tunnel junctions. The demonstrated technique provides a valuable tool to assess the decoherence sources related to circuit interfaces and to tunnel junctions that is readily applicable to standard qubit samples.
Parasitic two-level tunneling systems (TLS) emerge in amorphous dielectrics and constitute a serious nuisance for various microfabricated devices, where they act as a source of noiseand decoherence. Here, we demonstrate a new test bed for the study of TLS in various materials which provides access to properties of individual TLS as well as their ensemble response. We terminate a superconducting transmission-line resonator with a capacitor that hosts TLS in its dielectric. By tuning TLS via applied mechanical strain, we observe the signatures of individual TLS strongly coupled to the resonator in its transmission characteristics and extract the coupling components of their dipole moments and energy relaxation rates. The strong and well-defined coupling to the TLS bath results in pronounced resonator frequency fluctuations and excess phase noise, through which we can study TLS ensemble effects such as spectral diffusion, and probe theoretical models of TLS interaction.