A Compact Broadband Purcell Filter for Superconducting Quantum Circuits in a 3D Flip-Chip Architecture

  1. Zhen Luo,
  2. Lea Richard,
  3. Ivan Tsitsilin,
  4. Anirban Bhattacharjee,
  5. Christian M. F. Schneider,
  6. Stefan Filipp,
  7. and Amelie Hagelauer
Fast and high-fidelity qubit readout requires strong coupling between the readout resonator and the feedline. However, such coupling unavoidably enhances qubit decay through the Purcell
effect. We present a four-pole broadband Purcell filter implemented on a 3D flip-chip platform to overcome this trade-off. The filter provides a flat 1 GHz passband centered at 7.68 GHz and achieves more than 45 dB suppression at typical qubit frequencies. We demonstrate the filter’s compatibility with multiplexed readout using a test chip that integrates six floating readout resonators strongly coupled within the passband. The chip is fabricated using a 150 nm Niobium (Nb) thin-film process and characterized at 20 mK in a cryogenic measurement setup. We also develop an analytical model that accurately captures the filter response and determines the resonance frequencies and external quality factors of the floating resonators directly from their physical geometry, enabling rapid circuit synthesis and design optimization. The proposed design is compact and fabrication-tolerant, making it a practical solution for large-scale superconducting quantum processors.

Long-range connectivity in a superconducting quantum processor using a ring resonator

  1. Sumeru Hazra,
  2. Anirban Bhattacharjee,
  3. Madhavi Chand,
  4. Kishor V. Salunkhe,
  5. Sriram Gopalakrishnan,
  6. Meghan P. Patankar,
  7. and R. Vijay
Qubit coherence and gate fidelity are typically considered the two most important metrics for characterizing a quantum processor. An equally important metric is inter-qubit connectivity
as it minimizes gate count and allows implementing algorithms efficiently with reduced error. However, inter-qubit connectivity in superconducting processors tends to be limited to nearest neighbour due to practical constraints in the physical realization. Here, we introduce a novel superconducting architecture that uses a ring resonator as a multi-path coupling element with the qubits uniformly distributed throughout its circumference. Our planar design provides significant enhancement in connectivity over state of the art superconducting processors without any additional fabrication complexity. We theoretically analyse the qubit connectivity and experimentally verify it in a device capable of supporting up to twelve qubits where each qubit can be connected to nine other qubits. Our concept is scalable, adaptable to other platforms and has the potential to significantly accelerate progress in quantum computing, annealing, simulations and error correction.

Engineering Cross Resonance Interaction in Multi-modal Quantum Circuits

  1. Sumeru Hazra,
  2. Kishor V. Salunkhe,
  3. Anirban Bhattacharjee,
  4. Gaurav Bothara,
  5. Suman Kundu,
  6. Tanay Roy,
  7. Meghan P. Patankar,
  8. and R. Vijay
Existing scalable superconducting quantum processors have only nearest-neighbor coupling. This leads to reduced circuit depth, requiring large series of gates to perform an arbitrary
unitary operation in such systems. Recently, multi-modal devices have been demonstrated as a promising candidate for small quantum processor units. Always on longitudinal coupling in such circuits leads to implementation of native high fidelity multi-qubit gates. We propose an architecture using such devices as building blocks for a highly connected larger quantum circuit. To demonstrate a quantum operation between such blocks, a standard transmon is coupled to the multi-modal circuit using a 3D bus cavity giving rise to small exchange interaction between the transmon and one of the modes. We study the cross resonance interaction in such systems and characterize the entangling operation as well as the unitary imperfections and cross-talk as a function of device parameters. Finally, we tune up the cross resonance drive to implement multi-qubit gates in this architecture.