The overhead of quantum error correction (QEC) poses a major bottleneck for realizing fault-tolerant computation. To reduce this overhead, we exploit the idea of erasure qubits, relyingon an efficient conversion of the dominant noise into erasures at known locations. We start by introducing a formalism for QEC schemes with erasure qubits and express the corresponding decoding problem as a matching problem. Then, we propose and optimize QEC schemes based on erasure qubits and the recently-introduced Floquet codes. Our schemes are well-suited for superconducting circuits, being compatible with planar layouts. We numerically estimate the memory thresholds for the circuit noise model that includes spreading (via entangling operations) and imperfect detection of erasures. Our results demonstrate that, despite being slightly more complex, QEC schemes based on erasure qubits can significantly outperform standard approaches.
Quantum error correction with erasure qubits promises significant advantages over standard error correction due to favorable thresholds for erasure errors. To realize this advantagein practice requires a qubit for which nearly all errors are such erasure errors, and the ability to check for erasure errors without dephasing the qubit. We experimentally demonstrate that a „dual-rail qubit“ consisting of a pair of resonantly-coupled transmons can form a highly coherent erasure qubit, where the erasure error rate is given by the transmon T1 but for which residual dephasing is strongly suppressed, leading to millisecond-scale coherence within the qubit subspace. We show that single-qubit gates are limited primarily by erasure errors, with erasure probability perasure=2.19(2)×10−3 per gate while the residual errors are ∼40 times lower. We further demonstrate mid-circuit detection of erasure errors while introducing <0.1% dephasing error per check. Finally, we show that the suppression of transmon noise allows this dual-rail qubit to preserve high coherence over a broad tunable operating range, offering an improved capacity to avoid frequency collisions. This work establishes transmon-based dual-rail qubits as an attractive building block for hardware-efficient quantum error correction.[/expand]
The amplitude damping time, T1, has long stood as the major factor limiting quantum fidelity in superconducting circuits, prompting concerted efforts in the material science and designof qubits aimed at increasing T1. In contrast, the dephasing time, Tϕ, can usually be extended above T1 (via, e.g., dynamical decoupling), to the point where it does not limit fidelity. In this article we propose a scheme for overcoming the conventional T1 limit on fidelity by designing qubits in a way that amplitude damping errors can be detected and converted into erasure errors. Compared to standard qubit implementations our scheme improves the performance of fault-tolerant protocols, as numerically demonstrated by the circuit-noise simulations of the surface code. We describe two simple qubit implementations with superconducting circuits and discuss procedures for detecting amplitude damping errors, performing entangling gates, and extending Tϕ. Our results suggest that engineering efforts should focus on improving Tϕ and the quality of quantum coherent control, as they effectively become the limiting factor on the performance of fault-tolerant protocols.