Scalable High-Performance Fluxonium Quantum Processor

  1. Long B. Nguyen,
  2. Gerwin Koolstra,
  3. Yosep Kim,
  4. Alexis Morvan,
  5. Trevor Chistolini,
  6. Shraddha Singh,
  7. Konstantin N. Nesterov,
  8. Christian Jünger,
  9. Larry Chen,
  10. Zahra Pedramrazi,
  11. Bradley K. Mitchell,
  12. John Mark Kreikebaum,
  13. Shruti Puri,
  14. David I. Santiago,
  15. and Irfan Siddiqi Singh
The technological development of hardware heading toward universal fault-tolerant quantum computation requires a large-scale processing unit with high performance. While fluxonium qubits are promising with high coherence and large anharmonicity, their scalability has not been systematically explored. In this work, we propose a superconducting quantum information processor based on compact high-coherence fluxoniums with suppressed crosstalk, reduced design complexity, improved operational efficiency, high-fidelity gates, and resistance to parameter fluctuations. In this architecture, the qubits are readout dispersively using individual resonators connected to a common bus and manipulated via combined on-chip RF and DC control lines, both of which can be designed to have low crosstalk. A multi-path coupling approach enables exchange interactions between the high-coherence computational states and at the same time suppresses the spurious static ZZ rate, leading to fast and high-fidelity entangling gates. We numerically investigate the cross resonance controlled-NOT and the differential AC-Stark controlled-Z operations, revealing low gate error for qubit-qubit detuning bandwidth of up to 1 GHz. Our study on frequency crowding indicates high fabrication yield for quantum processors consisting of over thousands of qubits. In addition, we estimate low resource overhead to suppress logical error rate using the XZZX surface code. These results promise a scalable quantum architecture with high performance for the pursuit of universal quantum computation.
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