Observation of Interface Piezoelectricity in Superconducting Devices on Silicon

  1. Haoxin Zhou,
  2. Eric Li,
  3. Kadircan Godeneli,
  4. Zi-Huai Zhang,
  5. Shahin Jahanbani,
  6. Kangdi Yu,
  7. Mutasem Odeh,
  8. Shaul Aloni,
  9. Sinéad Griffin,
  10. and Alp Sipahigil
The evolution of superconducting quantum processors is driven by the need to reduce errors and scale for fault-tolerant computation. Reducing physical qubit error rates requires further
advances in the microscopic modeling and control of decoherence mechanisms in superconducting qubits. Piezoelectric interactions contribute to decoherence by mediating energy exchange between microwave photons and acoustic phonons. Centrosymmetric materials like silicon and sapphire do not display piezoelectricity and are the preferred substrates for superconducting qubits. However, the broken centrosymmetry at material interfaces may lead to piezoelectric losses in qubits. While this loss mechanism was predicted two decades ago, interface piezoelectricity has not been experimentally observed in superconducting devices. Here, we report the observation of interface piezoelectricity at an aluminum-silicon junction and show that it constitutes an important loss channel for superconducting devices. We fabricate aluminum interdigital surface acoustic wave transducers on silicon and demonstrate piezoelectric transduction from room temperature to millikelvin temperatures. We find an effective electromechanical coupling factor of K2≈2×10−5% comparable to weakly piezoelectric substrates. We model the impact of the measured interface piezoelectric response on superconducting qubits and find that the piezoelectric surface loss channel limits qubit quality factors to Q∼104−108 for designs with different surface participation ratios and electromechanical mode matching. These results identify electromechanical surface losses as a significant dissipation channel for superconducting qubits, and show the need for heterostructure and phononic engineering to minimize errors in next-generation superconducting qubits.

Acceptor-induced bulk dielectric loss in superconducting circuits on silicon

  1. Zi-Huai Zhang,
  2. Kadircan Godeneli,
  3. Justin He,
  4. Mutasem Odeh,
  5. Haoxin Zhou,
  6. Srujan Meesala,
  7. and Alp Sipahigil
The performance of superconducting quantum circuits is primarily limited by dielectric loss due to interactions with two-level systems (TLS). State-of-the-art circuits with engineered
material interfaces are approaching a limit where dielectric loss from bulk substrates plays an important role. However, a microscopic understanding of dielectric loss in crystalline substrates is still lacking. In this work, we show that boron acceptors in silicon constitute a strongly coupled TLS bath for superconducting circuits. We discuss how the electronic structure of boron acceptors leads to an effective TLS response in silicon. We sweep the boron concentration in silicon and demonstrate the bulk dielectric loss limit from boron acceptors. We show that boron-induced dielectric loss can be reduced in a magnetic field due to the spin-orbit structure of boron. This work provides the first detailed microscopic description of a TLS bath for superconducting circuits, and demonstrates the need for ultrahigh purity substrates for next-generation superconducting quantum processors.