quality. New features include tightening constraints, imposing edgewise differences, including edge orientation in the optimization, and integrating multimodule designs with various boundary conditions. These enhancements allow for greater flexibility in processor design by eliminating the need for handpicked orientations. We support the efficient assembly of large processors with dense connectivity by choosing the best boundary conditions. Examples demonstrate that, at low computational cost, the new optimization approach finds a frequency configuration for a square chip with over 1,000 qubits and over 10% yield at much larger dispersion levels than required by previous approaches.