Logical multi-qubit entanglement with dual-rail superconducting qubits

  1. Wenhui Huang,
  2. Xuandong Sun,
  3. Jiawei Zhang,
  4. Zechen Guo,
  5. Peisheng Huang,
  6. Yongqi Liang,
  7. Yiting Liu,
  8. Daxiong Sun,
  9. Zilin Wang,
  10. Yuzhe Xiong,
  11. Xiaohan Yang,
  12. Jiajian Zhang,
  13. Libo Zhang,
  14. Ji Chu,
  15. Weijie Guo,
  16. Ji Jiang,
  17. Song Liu,
  18. Jingjing Niu,
  19. Jiawei Qiu,
  20. Ziyu Tao,
  21. Yuxuan Zhou,
  22. Xiayu Linpeng,
  23. Youpeng Zhong,
  24. and Dapeng Yu
Recent advances in quantum error correction (QEC) across hardware platforms have demonstrated operation near and beyond the fault-tolerance threshold, yet achieving exponential suppression
of logical errors through code scaling remains a critical challenge. Erasure qubits, which enable hardware-level detection of dominant error types, offer a promising path toward resource-efficient QEC by exploiting error bias. Single erasure qubits with dual-rail encoding in superconducting cavities and transmons have demonstrated high coherence and low single-qubit gate errors with mid-circuit erasure detection, but the generation of multi-qubit entanglement–a fundamental requirement for quantum computation and error correction–has remained an outstanding milestone. Here, we demonstrate a superconducting processor integrating four dual-rail erasure qubits that achieves the logical multi-qubit entanglement with error-biased protection. Each dual-rail qubit, encoded in pairs of tunable transmons, preserves millisecond-scale coherence times and single-qubit gate errors at the level of 10−5. By engineering tunable couplings between logical qubits, we generate high-fidelity entangled states resilient to physical qubit noise, including logical Bell states (98.8% fidelity) and a three-logical-qubit Greenberger-Horne-Zeilinger (GHZ) state (93.5% fidelity). A universal gate set is realized through a calibrated logical controlled-NOT (CNOT) gate with 96.2% process fidelity, enabled by coupler-activated XX interactions in the protected logical subspace. This work advances dual-rail architectures beyond single-qubit demonstrations, providing a blueprint for concatenated quantum error correction with erasure qubits.

Coupler-Assisted Leakage Reduction for Scalable Quantum Error Correction with Superconducting Qubits

  1. Xiaohan Yang,
  2. Ji Chu,
  3. Zechen Guo,
  4. Wenhui Huang,
  5. Yongqi Liang,
  6. Jiawei Liu,
  7. Jiawei Qiu,
  8. Xuandong Sun,
  9. Ziyu Tao,
  10. Jiawei Zhang,
  11. Jiajian Zhang,
  12. Libo Zhang,
  13. Yuxuan Zhou,
  14. Weijie Guo,
  15. Ling Hu,
  16. Ji Jiang,
  17. Yang Liu,
  18. Xiayu Linpeng,
  19. Tingyong Chen,
  20. Yuanzhen Chen,
  21. Jingjing Niu,
  22. Song Liu,
  23. Youpeng Zhong,
  24. and Dapeng Yu
Superconducting qubits are a promising platform for building fault-tolerant quantum computers, with recent achievement showing the suppression of logical error with increasing code
size. However, leakage into non-computational states, a common issue in practical quantum systems including superconducting circuits, introduces correlated errors that undermine QEC scalability. Here, we propose and demonstrate a leakage reduction scheme utilizing tunable couplers, a widely adopted ingredient in large-scale superconducting quantum processors. Leveraging the strong frequency tunability of the couplers and stray interaction between the couplers and readout resonators, we eliminate state leakage on the couplers, thus suppressing space-correlated errors caused by population propagation among the couplers. Assisted by the couplers, we further reduce leakage to higher qubit levels with high efficiency (98.1%) and low error rate on the computational subspace (0.58%), suppressing time-correlated errors during QEC cycles. The performance of our scheme demonstrates its potential as an indispensable building block for scalable QEC with superconducting qubits.