Thomas Murray

Temperature-Dependent Dielectric Function of Tantalum Nitride Formed by Atomic Layer Deposition for Tunnel Barriers in Josephson Junctions

  1. Ekta Bhatia,
  2. Aaron Lopez Gonzalez,
  3. Yoshitha Hettige,
  4. Tuan Vo,
  5. Sandra Schujman,
  6. Kevin Musick,
  7. Thomas Murray,
  8. Kim Kisslinger,
  9. Chenyu Zhou,
  10. Mingzhao Liu,
  11. Satyavolu S. Papa Rao,
  12. and Stefan Zollner
We report the dielectric functions of insulating tantalum nitride (TaN) films, deposited using atomic layer deposition (ALD) on 300 mm Si/SiO2 substrates, to demonstrate their suitability
as tunnel barriers in tantalum-based Josephson junctions (JJ) for superconducting quantum circuits. The temperature-dependent ellipsometric angles were measured using ALD TaN films with nominal thicknesses of 13 nm and 25 nm at an incidence angle of 70 degrees, across photon energy ranges of 0.03 eV to 0.7 eV (80-300 K) and 0.5 eV to 6.5 eV (80-600 K). This data was used to develop a dispersion model for insulating ALD TaN films that incorporates a Tauc-Lorentz oscillator with a band gap of 1.5-1.8 eV to model the interband optical transitions. The extracted dielectric function of ALD TaN films shows an insulating behavior (mid-infrared transparency) at all temperatures and for both film thicknesses tested. ALD TaN does not exhibit infrared absorption due to free carriers, even at elevated temperatures, demonstrating its insulating nature, which is required for the tunnel barrier of the JJ in quantum applications. The results of transmission electron microscopy, including selected area electron diffraction, and X-ray diffraction are also discussed. Sputter depth-profile X-ray photoelectron spectroscopy (XPS) shows an N/Ta ratio of ~1.2 throughout the film. The lower band gap, low roughness, and thermal stability of ALD TaN compared to AlOx suggest the possibility of fabricating JJs with thicker barriers while achieving critical current densities required for qubits, better control of thickness and composition, reduced topography, and resistance to aging.
arxiv pdf

Ta-based Josephson junctions using insulating ALD TaN tunnel barriers

  1. Ekta Bhatia,
  2. Jack Lombardi,
  3. Tuan Vo,
  4. Michael Senatore,
  5. Alexander Madden,
  6. Soumen Kar,
  7. Hunter Frost,
  8. Stephen Olson,
  9. Jakub Nalaskowski,
  10. John Mucci,
  11. Brian Martinick,
  12. Ilyssa Wells,
  13. Thomas Murray,
  14. Kevin Musick,
  15. Corbet S. Johnson,
  16. Stephen McCoy,
  17. Daniel L. Campbell,
  18. Matthew D. LaHaye,
  19. and Satyavolu S. Papa Rao
Josephson junctions form the core circuit element in superconducting quantum computing circuits, single flux quantum digital logic circuits, and sensing devices such as SQUIDs. Aluminum
oxide has typically been used as the tunnel barrier. Its formation by exposure to low oxygen pressures at room temperature for short periods of time makes it susceptible to aging and limits the thermal budget of downstream processes. In this paper, we report the first demonstration of {\alpha}-Ta/insulating TaN/a-Ta superconductor/insulator/superconductor Josephson junctions fabricated on 300 mm wafers using CMOS-compatible processes. The junctions were fabricated on high-resistivity silicon substrates using standard processes available at 300 mm scale, including 193 nm optical lithography, ALD of TaN in a cluster tool, and chemical mechanical planarization to enable highly planar interfaces. Junction areas ranging from 0.03 um2 to 9 um2 with ALD TaN thickness between 2 nm and 7 nm were characterized. A critical current density of 76 uA/um2 was observed in junctions using 4 nm ALD TaN in the tunnel barrier. The dependence of Jc on ALD TaN layer thickness is analyzed, and the influence of junction geometry, packaging, and temperature on I-V characteristics is discussed. Junctions were retested after a period of 4 months to quantify junction aging. The potential of this novel material system and a 300 mm superconducting junction process flow to fabricate thermally and environmentally stable junctions is discussed. The vision of a Superconducting Quantum Process Design Kit for a Multi-Project Wafer program to enable rapid development and proliferation of superconducting quantum and digital digital logic systems is presented. This work represents the first step towards establishing such a Quantum Foundry, providing access to high quality qubits and single-flux quantum logic circuits at 300 mm wafer scale.
arxiv pdf