Peisheng Huang

A Low-Noise and High-Stability DC Source for Superconducting Quantum Circuits

  1. Daxiong Sun,
  2. Jiawei Zhang,
  3. Peisheng Huang,
  4. Yubin Zhang,
  5. Zechen Guo,
  6. Tingjin Chen,
  7. Rui Wang,
  8. Xuandong Sun,
  9. Jiajian Zhang,
  10. Wenhui Huang,
  11. Jiawei Qiu,
  12. Ji Chu,
  13. Ziyu Tao,
  14. Weijie Guo,
  15. Xiayu Linpeng,
  16. Ji Jiang,
  17. Jingjing Niu,
  18. Youpeng Zhong,
  19. and Dapeng Yu
With the rapid scaling of superconducting quantum processors, electronic control systems relying on commercial off-the-shelf instruments face critical bottlenecks in signal density,power consumption, and crosstalk mitigation. Here we present a custom dual-channel direct current (DC) source module (QPower) dedicated for large-scale superconducting quantum processors. The module delivers a voltage range of ±7 V with 200 mA maximum current per channel, while achieving the following key performance benchmarks: noise spectral density of 20 nV/Hz‾‾‾√ at 10 kHz, output ripple <500 μVpp within 20 MHz bandwidth, and long-term voltage drift <5 μVpp over 12 hours. Integrated into the control electronics of a 66-qubit quantum processor, QPower enables qubit coherence times of T1=87.6 μs and Ramsey T2=5.1 μs, with qubit resonance frequency drift constrained to ±40 kHz during 12-hour operation. This modular design is compact in size and efficient in energy consumption, providing a scalable DC source solution for intermediate-scale quantum processors with stringent noise and stability requirements, with potential extensions to other quantum hardware platforms and precision measurement.[/expand]
arxiv pdf

Logical multi-qubit entanglement with dual-rail superconducting qubits

  1. Wenhui Huang,
  2. Xuandong Sun,
  3. Jiawei Zhang,
  4. Zechen Guo,
  5. Peisheng Huang,
  6. Yongqi Liang,
  7. Yiting Liu,
  8. Daxiong Sun,
  9. Zilin Wang,
  10. Yuzhe Xiong,
  11. Xiaohan Yang,
  12. Jiajian Zhang,
  13. Libo Zhang,
  14. Ji Chu,
  15. Weijie Guo,
  16. Ji Jiang,
  17. Song Liu,
  18. Jingjing Niu,
  19. Jiawei Qiu,
  20. Ziyu Tao,
  21. Yuxuan Zhou,
  22. Xiayu Linpeng,
  23. Youpeng Zhong,
  24. and Dapeng Yu
Recent advances in quantum error correction (QEC) across hardware platforms have demonstrated operation near and beyond the fault-tolerance threshold, yet achieving exponential suppression
of logical errors through code scaling remains a critical challenge. Erasure qubits, which enable hardware-level detection of dominant error types, offer a promising path toward resource-efficient QEC by exploiting error bias. Single erasure qubits with dual-rail encoding in superconducting cavities and transmons have demonstrated high coherence and low single-qubit gate errors with mid-circuit erasure detection, but the generation of multi-qubit entanglement–a fundamental requirement for quantum computation and error correction–has remained an outstanding milestone. Here, we demonstrate a superconducting processor integrating four dual-rail erasure qubits that achieves the logical multi-qubit entanglement with error-biased protection. Each dual-rail qubit, encoded in pairs of tunable transmons, preserves millisecond-scale coherence times and single-qubit gate errors at the level of 10−5. By engineering tunable couplings between logical qubits, we generate high-fidelity entangled states resilient to physical qubit noise, including logical Bell states (98.8% fidelity) and a three-logical-qubit Greenberger-Horne-Zeilinger (GHZ) state (93.5% fidelity). A universal gate set is realized through a calibrated logical controlled-NOT (CNOT) gate with 96.2% process fidelity, enabled by coupler-activated XX interactions in the protected logical subspace. This work advances dual-rail architectures beyond single-qubit demonstrations, providing a blueprint for concatenated quantum error correction with erasure qubits.
arxiv pdf