P. Klimov

High speed flux sampling for tunable superconducting qubits with an embedded cryogenic transducer

  1. B. Foxen,
  2. J. Y. Mutus,
  3. E. Lucero,
  4. E. Jeffrey,
  5. D. Sank,
  6. R. Barends,
  7. K. Arya,
  8. B. Burkett,
  9. Yu Chen,
  10. Zijun Chen,
  11. B. Chiaro,
  12. A. Dunsworth,
  13. A. Fowler,
  14. C. Gidney,
  15. M. Giustina,
  16. R. Graff,
  17. T. Huang,
  18. J. Kelly,
  19. P. Klimov,
  20. A. Megrant,
  21. O. Naaman,
  22. M. Neeley,
  23. C. Neill,
  24. C. Quintana,
  25. P. Roushan,
  26. A. Vainsencher,
  27. J. Wenner,
  28. T. C. White,
  29. and John M. Martinis
We develop a high speed on-chip flux measurement using a capacitively shunted SQUID as an embedded cryogenic transducer and apply this technique to the qualification of a near-term
scalable printed circuit board (PCB) package for frequency tunable superconducting qubits. The transducer is a flux tunable LC resonator where applied flux changes the resonant frequency. We apply a microwave tone to probe this frequency and use a time-domain homodyne measurement to extract the reflected phase as a function of flux applied to the SQUID. The transducer response bandwidth is 2.6 GHz with a maximum gain of 1200∘/Φ0 allowing us to study the settling amplitude to better than 0.1%. We use this technique to characterize on-chip bias line routing and a variety of PCB based packages and demonstrate that step response settling can vary by orders of magnitude in both settling time and amplitude depending on if normal or superconducting materials are used. By plating copper PCBs in aluminum we measure a step response consistent with the packaging used for existing high-fidelity qubits.
arxiv pdf

Qubit compatible superconducting interconnects

  1. B. Foxen,
  2. J. Y. Mutus,
  3. E. Lucero,
  4. R. Graff,
  5. A. Megrant,
  6. Yu Chen,
  7. C. Quintana,
  8. B. Burkett,
  9. J. Kelly,
  10. E. Jeffrey,
  11. Yan Yang,
  12. Anthony Yu,
  13. K. Arya,
  14. R. Barends,
  15. Zijun Chen,
  16. B. Chiaro,
  17. A. Dunsworth,
  18. A. Fowler,
  19. C. Gidney,
  20. M. Giustina,
  21. T. Huang,
  22. P. Klimov,
  23. M. Neeley,
  24. C. Neill,
  25. P. Roushan,
  26. D. Sank,
  27. A. Vainsencher,
  28. J. Wenner,
  29. T. C. White,
  30. and John M. Martinis
We present a fabrication process for fully superconducting interconnects compatible with superconducting qubit technology. These interconnects allow for the 3D integration of quantum
circuits without introducing lossy amorphous dielectrics. They are composed of indium bumps several microns tall separated from an aluminum base layer by titanium nitride which serves as a diffusion barrier. We measure the whole structure to be superconducting (transition temperature of 1.1K), limited by the aluminum. These interconnects have an average critical current of 26.8mA, and mechanical shear and thermal cycle testing indicate that these devices are mechanically robust. Our process provides a method that reliably yields superconducting interconnects suitable for use with superconducting qubits.
arxiv pdf