Si(100) substrates. We systematically investigate how deposition conditions, dry-etch power and in-situ resist strip temperature affect morphology, superconducting properties and dielectric losses. By tuning reactive sputtering conditions, three distinct preferred crystal orientations – (111), (200), and mixed are achieved. Our results demonstrate that all films exhibiting similar minimal two-level system (TLS) losses, with TiN111 exhibit the lowest median TLS losses δ̃ TLS, and greater robustness against reoxidation. The applied structuring process, in contrast, had a far greater influence on the TLS loss than the crystal orientation of the TiN film and, consequently, the intrinsic material properties of the superconducting layer. The lowest TLS losses for all TiN depositons were achieved with a low power etch and low temperature resist strip. An additional buffered oxide etch (BOE) treatment could remove high-loss interfacial oxides at the metal-air (MA) and substrate-air (SA) interface and recover the etch-induced TLS losses. Consequently, TiN resonators exhibiting δ̃ TLS values as low as 9.67×10−7 were realized. The corresponding median low-power loss, δ̃ LP, amounts to 11.04×10−7, which translates to an internal quality factor approaching one million. These findings highlight the critical role of process induced oxide formation at the MA and SA interfaces in limiting the performance of TiN resonators and provide a scalable, low-loss process compatible with industry-grade 200 mm CMOS qubit fabrication workflows.