Mitchell Field

Probing the memory of a superconducting qubit environment

  1. Nicolas Gosling,
  2. Denis Bénâtre,
  3. Nicolas Zapata,
  4. Paul Kugler,
  5. Mitchell Field,
  6. Sumeru Hazra,
  7. Simon Günzler,
  8. Thomas Reisinger,
  9. Martin Spiecker,
  10. Mathieu Féchant,
  11. and Ioan M. Pop
Achieving fault tolerance with superconducting quantum processors requires qubits to operate within the regime of threshold theorems based on the Born-Markov approximation. This approximation,
which models dissipation as constant energy decay into a memoryless environment, breaks down when qubits couple to long-lived two-level systems (TLSs) that become polarized during operation and retain memory of past qubit states. Here, we show that non-Poissonian quantum jump traces carry the information required to distinguish long-lived TLSs from the standard Markovian bath. By fitting the Solomon equations to measured quantum jumps dynamics arising naturally due to thermal fluctuations, we can disentangle the coupling of the qubit to the two environments. Sweeping the qubit frequency reveals distinct peaks, each associated with a TLS that outlives the qubit, providing a handle to understand their microscopic origin.
arxiv pdf

On-chip stencil lithography for superconducting qubits

  1. Roudy Hanna,
  2. Sören Ihssen,
  3. Simon Geisert,
  4. Umut Kocak,
  5. Matteo Arfini,
  6. Albert Hertel,
  7. Thomas J. Smart,
  8. Michael Schleenvoigt,
  9. Tobias Schmitt,
  10. Joscha Domnick,
  11. Kaycee Underwood,
  12. Abdur Rehman Jalil,
  13. Jin Hee Bae,
  14. Benjamin Bennemann,
  15. Mathieu Féchant,
  16. Mitchell Field,
  17. Martin Spiecker,
  18. Nicolas Zapata,
  19. Christian Dickel,
  20. Erwin Berenschot,
  21. Niels Tas,
  22. Gary A. Steele,
  23. Detlev Grützmacher,
  24. Ioan M. Pop,
  25. and Peter Schüffelgen
Improvements in circuit design and more recently in materials and surface cleaning have contributed to a rapid development of coherent superconducting qubits. However, organic resists
commonly used for shadow evaporation of Josephson junctions (JJs) pose limitations due to residual contamination, poor thermal stability and compatibility under typical surface-cleaning conditions. To provide an alternative, we developed an inorganic SiO2/Si3N4 on-chip stencil lithography mask for JJ fabrication. The stencil mask is resilient to aggressive cleaning agents and it withstands high temperatures up to 1200\textdegree{}C, thereby opening new avenues for JJ material exploration and interface optimization. To validate the concept, we performed shadow evaporation of Al-based transmon qubits followed by stencil mask lift-off using vapor hydrofluoric acid, which selectively etches SiO2. We demonstrate average $T_1 \approx 75 \pm 11~\SI{}{\micro\second}$ over a 200 MHz frequency range in multiple cool-downs for one device, and $T_1 \approx 44\pm 8~\SI{}{\micro\second}$ for a second device. These results confirm the compatibility of stencil lithography with state-of-the-art superconducting quantum devices and motivate further investigations into materials engineering, film deposition and surface cleaning techniques.
arxiv pdf