Optimization of High-Fidelity Single-Qubit Gates for Fluxoniums Using Single-Flux Quantum Control

  1. Maxime Lapointe-Major,
  2. Boyan Torosov,
  3. Bohdan Kulchytskyy,
  4. and Pooya Ronagh
We present a gradient-based method to construct memory-efficient, high-fidelity, single-qubit gates for fluxonium qubits. These gates are constructed using a sequence of single-flux
quantum (SFQ) pulses that are sent to the qubit through either capacitive or inductive coupling. The schedule of SFQ pulses is constructed with an on-ramp and an off-ramp applied prior to and after a pulse train, where the pulses are spaced at intervals equal to the qubit period. We reduce the optimization problem to the scheduling of a fixed number of SFQ pulses in the on-ramp and solve it by relaxing the discretization constraint of the SFQ clock as an intermediate step, allowing the use of the Broyden-Fletcher-Goldfarb-Shanno optimizer. Using this approach, gate fidelities of 99.99 % can be achieved for inductive coupling and 99.9 % for capacitive coupling, with leakage being the main source of coherent errors for both approaches.

Optimizing Pulse Shapes of an Echoed Conditional Displacement Gate in a Superconducting Bosonic System

  1. Maxime Lapointe-Major,
  2. Yongchao Tang,
  3. Mehmet Canturk,
  4. and Pooya Ronagh
Echoed conditional displacement (ECD) gates for bosonic systems have become the key element for real-time quantum error correction beyond the break-even point. These gates are characterized
by a single complex parameter β, and can be constructed using Gaussian pulses and free evolutions with the help of an ancillary transmon qubit. We show that there is a lower bound for the gate time in the standard construction of an ECD gate. We present a method for optimizing the pulse shape of an ECD gate using a pulse-shaping technique subject to a set of experimental constraints. Our optimized pulse shapes remain symmetric, and can be applied to a range of target values of β by tuning only the amplitude. We demonstrate that the total gate time of an ECD gate for a small value of β can be reduced either by relaxing the no-overlap constraint on the primitives used in the standard construction or via our optimal-control method. We show a slight advantage of the optimal-control method by demonstrating a reduction in the preparation time of a |+ZGKP> logical state by ∼10%.