commonly used for shadow evaporation of Josephson junctions (JJs) pose limitations due to residual contamination, poor thermal stability and compatibility under typical surface-cleaning conditions. To provide an alternative, we developed an inorganic SiO2/Si3N4 on-chip stencil lithography mask for JJ fabrication. The stencil mask is resilient to aggressive cleaning agents and it withstands high temperatures up to 1200\textdegree{}C, thereby opening new avenues for JJ material exploration and interface optimization. To validate the concept, we performed shadow evaporation of Al-based transmon qubits followed by stencil mask lift-off using vapor hydrofluoric acid, which selectively etches SiO2. We demonstrate average $T_1 \approx 75 \pm 11~\SI{}{\micro\second}$ over a 200 MHz frequency range in multiple cool-downs for one device, and $T_1 \approx 44\pm 8~\SI{}{\micro\second}$ for a second device. These results confirm the compatibility of stencil lithography with state-of-the-art superconducting quantum devices and motivate further investigations into materials engineering, film deposition and surface cleaning techniques.