This paper addresses frequency crowding constraints in modular quantum architecture design, focusing on the SNAIL-based quantum modules. Two key objectives are explored. First, we presentphysics-informed design constraints by describing a physical model for realizable gates within a SNAIL module and building a fidelity model using error budgeting derived from device characteristics. Second, we tackle the allocation problem by analyzing the impact of frequency crowding on gate fidelity as the radix of the module increases. We explore whether the gate fidelity can be preserved with a discrete set of qubit frequencies while adhering to defined separation thresholds. This work offers insights into novel quantum architectures and coupled optimization techniques to mitigate the effects of unstable noise and improve overall gate performance.
Noisy, Intermediate Scale Quantum (NISQ) computers have reached the point where they can show the potential for quantum advantage over classical computing. Unfortunately, NISQ machinesintroduce sufficient noise that even for moderate size quantum circuits the results can be unreliable. We propose a collaboratively designed superconducting quantum computer using a Superconducting Nonlinear Asymmetric Inductive eLement (SNAIL) modulator. The SNAIL modulator is designed by considering both the ideal fundamental qubit gate operation while maximizing the qubit coupling capabilities. We and others have demonstrated that the family, and particularly ‾‾‾‾‾‾√, provides an advantage over as a basis gate. In this work, we show how the SNAIL natively implements ‾‾‾‾‾‾√n functions with high-degree couplings and implementation of gates realized through proportionally scaled pulse lengths. Based on our previously demonstrated SNAIL-based quantum state router we present preliminary data extending the SNAIL-based modulator to four qubit modules. Furthermore, in this work, we co-design future SNAIL-based quantum computers that utilize the construction of richer interconnections based on classical 4-ary tree and hypercubes and compare their advantage to the traditional lattice and heavy-hex lattice for a suite of common quantum algorithms. To make our results more general, we consider both scenarios in which the total circuit time, for implementations dominated by decoherence, or total gate count, for implementations dominated by control imperfections. We demonstrate the co-design advantage based on real hardware SNAIL implementations and extrapolate to larger system sizes characterized from our real multi ‾‾‾‾‾‾√n qubit system with 4-ary tree and hypercube inspired interconnects.