Characterization and Reduction of Capacitive Loss Induced by Sub-Micron Josephson Junction Fabrication in Superconducting Qubits

  1. A. Dunsworth,
  2. A. Megrant,
  3. C. Quintana,
  4. Zijun Chen,
  5. R. Barends,
  6. B. Burkett,
  7. B. Foxen,
  8. Yu Chen,
  9. B. Chiaro,
  10. A. Fowler,
  11. R. Graff,
  12. E. Jeffrey,
  13. J. Kelly,
  14. E. Lucero,
  15. J. Y. Mutus,
  16. M. Neeley,
  17. C. Neill,
  18. P. Roushan,
  19. D. Sank,
  20. A. Vainsencher,
  21. J. Wenner,
  22. T. C. White,
  23. and John M. Martinis
Josephson junctions form the essential non-linearity for almost all superconducting qubits. The junction is formed when two superconducting electrodes come within ∼1 nm of each other. Although the capacitance of these electrodes is a small fraction of the total qubit capacitance, the nearby electric fields are more concentrated in dielectric surfaces and can contribute substantially to the total dissipation. We have developed a technique to experimentally investigate the effect of these electrodes on the quality of superconducting devices. We use λ/4 coplanar waveguide resonators to emulate lumped qubit capacitors. We add a variable number of these electrodes to the capacitive end of these resonators and measure how the additional loss scales with number of electrodes. We then reduce this loss with fabrication techniques that limit the amount of lossy dielectrics. We then apply these techniques to the fabrication of Xmon qubits on a silicon substrate to improve their energy relaxation times by a factor of 5.
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